S1R72U16B08E200 Epson

S1R72U16 USB2.0 Storage Host Controller LSI - Easy solution for USB memory - Support USB2.0 Host HS/FS Mode - Support ATA/ATAPI6 - No need any software for USB Overview S1R72U16 is a USB host storage controller LSI that supports USB2.0-compliant high-speed mode and IDE. Only adding S1R72U16 to the IDE bus of existing systems enables to add USB HS host function for USB storage device. Also S1R72U16 supports the 16bit general CPU interface. It is possible to add the USB2.0 high speed function for USB storage easily with ATA/ATAPI drivers and CF Drivers, so the system with S1R72U16 can support many kind of USB storage such like as a USB memory. Feature 1) Easy-to-Use - No need to develop any software for USB 2) High speed data transfer - High speed data transfer by Bridge Sequencer on the ATA100 high speed bus Specification 1) USB - High Speed mode (480Mbps) and Full Speed mode (12Mbps) - Support Host termination function - USB Host Stack, USB Mass Storage Class, USB HUB Class on chip 2) IDE Interface - Share the pins the CPU interface block - Support ATA/ATAPI6 PIO mode 0 to 4 Multi Word DMA mode 0 to 2 UDMA mode 0 to 5 3) CPU Interface - Share the pins the IDE interface block - 16bit general CPU interface (Memory bus) - Support DMA - Little Endian 4) Other - Clock is from the external 12MHz and 24MHz Xtal - Supply voltage USB3.3V, IDE3.3V, CPU interface=3.31.8V, Core=1.8V - Operation temperature 40C to 85C - Package QFP14-80 (12x12mm, 0.5mm pitch, 80pin), S1R72U16F14E100 PFBGA8UX81 (8x8mm, 0.8mm pitch, 81ball), S1R72U16B08E100 SEIKO EPSON CORPORATION XChgInt*1 GPI XCD0*1 XCD1*1 PLL Locked*3 Complianc eError 3:0 *3 XO XI CLKSEL CSEL T / CSEL*4 VBUSEN XHPDIAG T / - VBUSFLG XHDASP T /- XHRESET T / XHRESET*4 HINTRQ T / XINT*4 HIORDY T / - HDA T 2:0 / CA 2:0 *4 XHCS T 1:0 / XCS, CA 3 *4 DP XHIOR T / XRD*4 DM XHIOW T / XWR*4 R1 HDMARQ T / XDREQ*4 XHDMACK T / XDACK*4 HDD T 15:0 / CD 15:0 *4 S1R72U16 Block Diagram Main CPU I/F Selector GPO IDE Device CPUIF ATAxATAPI*2 Controller 2x1*2 CPUxIIDE*2 Bridge Sequencer FIFO SCLK0 SIN0 SIO SOUT0 DBGDCLK, DBGDT, debug i/f DBGST XRESET USB Host SIE Transceiver Macro OSC TSTEN, ATPGEN, test circuit BURNIN *1 Use these pins in the case of using USB storage device as Removal. *2 For CPU interface *3 For mode switching between IDE and CPU interface *4 For monitor to watch the internal operation and for USB compliance test SEIKO EPSON CORPORATION