CY7C67200 EZ-OTG Programmable USB On-The-Go Host/Peripheral Controller EZ-OTG Programmable USB On-The-Go Host/Peripheral Controller Fast serial port supports from 9600 baud to 2.0M baud EZ-OTG Features SPI supports both master and slave Single-chip programmable USB dual-role (Host/Peripheral) controller with two configurable Serial Interface Engines (SIEs) Supports 12 MHz external crystal or clock and two USB ports 2.7 V to 3.6 V power supply voltage Supports USB OTG protocol Package option: 48-pin FBGA On-chip 48-MHz 16-bit processor with dynamically switchable clock speed Typical Applications Configurable IO block supports a variety of IO options or up to EZ-OTG is a very powerful and flexible dual-role USB controller 25 bits of General Purpose IO (GPIO) that supports a wide variety of applications. It is primarily intended to enable USB OTG capability in applications such as: 4K 16 internal mask ROM contains built-in BIOS that supports 2 a communication-ready state with access to I C EEPROM Cellular phones interface, external ROM, UART, or USB PDAs and pocket PCs 8K x 16 internal RAM for code and data buffering Video and digital still cameras 16-bit parallel host port interface (HPI) with DMA/Mailbox data path for an external processor to directly access all on-chip MP3 players memory and control on-chip SIEs Mass storage devices Logic Block Diagram CY7C67200 CY7C67200 Timer 0 Timer 1 nRESET Control UART I/F Watchdog CY16 16-bit RISC CORE I2C Vbus, ID EEPROM I/F OTG D+,D- USB-A HSS I/F SIE1 HOST/ Peripheral GPIO 24:0 USB Ports SPI I/F D+,D- USB-A 4Kx16 8Kx16 ROM BIOS RAM SIE2 HPI I/F GPIO Mobile X1 PLL Power X2 Booster Errata: For information on silicon errata, see Errata on page 84. Details include trigger conditions, devices affected, and proposed workaround. Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document Number: 38-08014 Rev. *L Revised May 4, 2017 SHARED INPUT/OUTPUT PINSCY7C67200 Contents Introduction .......................................................................3 HSS Registers ........................................................... 47 Processor Core Functional Overview .............................3 HPI Registers ............................................................ 53 Processor ....................................................................3 SPI Registers ............................................................ 57 Clocking .......................................................................3 UART Registers ........................................................ 65 Memory .......................................................................3 Pin Diagram ..................................................................... 67 Interrupts .....................................................................3 Pin Descriptions ............................................................. 67 General Timers and Watchdog Timer .........................3 Absolute Maximum Ratings .......................................... 69 Power Management ....................................................3 Operating Conditions ..................................................... 69 Interface Descriptions ......................................................3 Crystal Requirements (XTALIN, XTALOUT) ................. 69 USB Interface ..............................................................4 DC Characteristics ........................................................ 70 OTG Interface ..............................................................4 USB Transceiver ....................................................... 71 General Purpose IO Interface .....................................4 AC Timing Characteristics ............................................. 71 UART Interface ............................................................4 Reset Timing ............................................................. 71 I2C EEPROM Interface ...............................................5 Clock Timing ............................................................. 72 Serial Peripheral Interface ...........................................5 I2C EEPROM Timing ............................................... 72 High-Speed Serial Interface ........................................5 HPI (Host Port Interface) Read Cycle Timing ............ 74 Host Port Interface (HPI) .............................................6 HSS BYTE Mode Transmit ........................................ 75 Charge Pump Interface ...............................................6 HSS Block Mode Transmit ........................................ 75 Booster Interface .........................................................7 HSS BYTE and BLOCK Mode Receive .................... 75 Crystal Interface ..........................................................8 Hardware CTS/RTS Handshake ............................... 76 Boot Configuration Interface ........................................8 Register Summary .......................................................... 77 Operational Modes ......................................................9 Ordering Information ...................................................... 81 Power Savings and Reset Description .........................10 Ordering Code Definitions ......................................... 81 Power Savings Mode Description .............................10 Package Diagram ............................................................ 82 Sleep .........................................................................10 Acronyms ........................................................................83 External (Remote) Wakeup Source ...........................10 Document Conventions ................................................. 83 Power-On Reset (POR) Description ..........................10 Units of Measure ....................................................... 83 Reset Pin ...................................................................10 Errata ...............................................................................84 USB Reset .................................................................10 Part Numbers Affected .............................................. 84 Memory Map ....................................................................10 CY7C67200 Qualification Status ............................... 84 Mapping .....................................................................10 CY7C67200 Errata Summary .................................... 84 Internal Memory ........................................................11 Document History Page ................................................. 91 Registers .........................................................................11 Sales, Solutions, and Legal Information ...................... 93 Processor Control Registers .....................................11 Worldwide Sales and Design Support ....................... 93 Timer Registers .........................................................18 Products ....................................................................93 General USB Registers .............................................20 PSoCSolutions .......................................................93 USB Host Only Registers ..........................................22 Cypress Developer Community ................................. 93 USB Device Only Registers ......................................30 Technical Support ..................................................... 93 OTG Control Registers ..............................................42 GPIO Registers .........................................................43 Document Number: 38-08014 Rev. *L Page 2 of 93