Please note that Cypress is an Infineon Technologies Company. The document following this cover page is marked as Cypress document as this is the company that originally developed the product. Please note that Infineon will continue to offer the product to new and existing customers as part of the Infineon product portfolio. Continuity of document content The fact that Infineon offers the following product as part of the Infineon product portfolio does not lead to any changes to this document. Future revisions will occur when appropriate, and any changes will be set out on the document history page. Continuity of ordering part numbers Infineon continues to support existing part numbers. Please continue to use the ordering part numbers listed in the datasheet for ordering. www.infineon.comCY7C68013A/CY7C68014A CY7C68015A/CY7C68016A EZ-USB FX2LP USB Microcontroller High-Speed USB Peripheral Controller EZ-USB FX2LP USB Microcontroller High-Speed USB Peripheral Controller 3.3-V operation with 5-V tolerant inputs Features Vectored USB interrupts and GPIF/FIFO interrupts USB 2.0 USB IF Hi-Speed certified (TID 40460272) Separate data buffers for the setup and data portions of a Single-chip integrated USB 2.0 transceiver, smart SIE, and CONTROL transfer enhanced 8051 microprocessor 2 1 Integrated I C controller runs at 100 or 400 kHz Fit-, form-, and function-compatible with the FX2 Four integrated FIFOs Pin-compatible0 Object-code-compatible Integrated glue logic and FIFOs lower system cost Functionally compatible (FX2LP is a superset) Automatic conversion to and from 16-bit buses Master or slave operation Ultra-low power: I no more than 85 mA in any mode CC Uses external clock or asynchronous strobes Ideal for bus- and battery-powered applications Easy interface to ASIC and DSP ICs Software: 8051 code runs from: Available in commercial and industrial temperature grades (all Internal RAM, which is downloaded through USB packages except VFBGA) Internal RAM, which is loaded from EEPROM External memory device (128-pin package) Features (CY7C68013A/14A only) 16 KB of on-chip code/data RAM CY7C68014A: Ideal for battery-powered applications Suspend current: 100 A (typ) Four programmable BULK, INTERRUPT, and ISOCHRONOUS endpoints CY7C68013A: Ideal for nonbattery-powered applications Buffering options: Double, triple, and quad Suspend current: 300 A (typ) Additional programmable (BULK/INTERRUPT) 64-byte Available in five Pb-free packages with up to 40 GPIOs endpoint 128-pin TQFP (40 GPIOs), 100-pin TQFP (40 GPIOs), 56-pin QFN (24 GPIOs), 56-pin SSOP (24 GPIOs), and 56-pin 8-bit or 16-bit external data interface VFBGA (24 GPIOs) Smart media standard ECC generation Features (CY7C68015A/16A only) GPIF (general programmable interface) CY7C68016A: Ideal for battery-powered applications Enables direct connection to most parallel interfaces Suspend current: 100 A (typ) Programmable waveform descriptors and configuration registers to define waveforms CY7C68015A: Ideal for nonbattery-powered applications Supports multiple ready (RDY) inputs and control (CTL) Suspend current: 300 A (typ) outputs Available in Pb-free 56-pin QFN package (26 GPIOs) Integrated, industry-standard, enhanced 8051 48-MHz, 24-MHz, or 12-MHz CPU operation Two more GPIOs than CY7C68013A/14A enabling additional features in the same footprint Four clocks per instruction cycle Two USARTs Functional Description Three counter/timers Expanded interrupt system For a complete list of related resources, click here. Two data pointers Errata: For information on silicon errata, see Errata on page 68. Details include trigger conditions, devices affected, and proposed workaround. Note 2 2 1. The actual I C clock frequency will be different. The measured I C clock frequency when set for 100 kHz and 400 kHz is around 85 kHz and 300 kHz respectively. Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600 Document Number: 38-08032 Rev. AC Revised July 26, 2019