FUJITSU SEMICONDUCTOR DS501-00004-1v0-E DATA SHEET Memory FRAM 1 M Bit (64 K 16) MB85R1002A DESCRIPTIONS The MB85R1002A is an FRAM (Ferroelectric Random Access Memory) chip consisting of 65,536 words 16 bits of nonvolatile memory cells fabricated using ferroelectric process and silicon gate CMOS process technologies. The MB85R1002A is able to retain data without using a back-up battery, as is needed for SRAM. 10 The memory cells used in the MB85R1002A can be used for 10 read/write operations, which is a significant 2 improvement over the number of read and write operations supported by Flash memory and E PROM. The MB85R1002A uses a pseudo-SRAM interface that is compatible with conventional asynchronous SRAM. FEATURES Bit configuration : 65,536 words 16 bits 10 Read/write endurance : 10 times Operating power supply voltage : 3.0 V to 3.6 V Operating temperature range : 40 C to + 85 C Data retention : 10 years ( + 55 C) LB and UB data byte control Package : 48-pin plastic TSOP (1) Copyright2011 FUJITSU SEMICONDUCTOR LIMITED All rights reserved 2011.7MB85R1002A PIN ASSIGNMENTS (TOP VIEW) 1 A15 48 NC A14 2 47 NC A13 3 46 VSS A12 4 45 I/O16 A11 5 44 I/O8 6 A10 43 I/O15 7 A9 42 I/O7 A8 8 41 I/O14 NC 9 40 I/O6 NC 10 39 I/O13 WE 11 38 I/O5 CE2 12 37 VDD 13 VSS 36 I/O12 UB 14 35 I/O4 LB 15 34 I/O11 VDD 16 33 I/O3 NC 17 32 I/O10 A7 18 31 I/O2 19 A6 30 I/O9 A5 20 29 I/O1 A4 21 28 OE A3 22 27 VSS A2 23 26 CE1 A1 24 25 A0 (FPT-48P-M48) PIN DESCRIPTIONS Pin Number Pin Name Functional Description 1 to 8, 18 to 25 A0 to A15 Address Input pins 29 to 36, 38 to 45 I/O1 to I/O16 Data Input/Output pins 26 CE1 Chip Enable 1 Input pin 12 CE2 Chip Enable 2 Input pin 11 WE Write Enable Input pin 28 OE Output Enable Input pin 14, 15 LB, UB Data Byte Control Input pins Supply Voltage pins 16, 37 VDD Connect all two pins to the power supply. Ground pins 13, 27, 46 VSS Connect all three pins to ground. 9, 10, 17, 47, 48 NC No Connect pins 2 DS501-00004-1v0-E