MB85RC16PNF-G-JNE1 Fujitsu

FUJITSU SEMICONDUCTOR DS501-00010-2v0-E DATA SHEET Memory FRAM 2 16 K (2 K 8) Bit I C MB85RC16V DESCRIPTION The MB85RC16V is an FRAM (Ferroelectric Random Access Memory) chip in a configuration of 2,048 words 8 bits, using the ferroelectric process and silicon gate CMOS process technologies for forming the nonvolatile memory cells. Unlike SRAM, the MB85RC16V is able to retain data without using a data backup battery. 10 The memory cells used in the MB85RC16V have at least 10 Read/Write operation endurance per bit, which is a significant improvement over the number of read and write operations supported by other nonvolatile memory products. The MB85RC16V can provide writing in one byte units because the long writing time is not required unlike 2 Flash memory and E PROM. Therefore, the writing completion waiting sequence like a write busy state is not required. FEATURES Bit configuration : 2,048 words 8 bits Operating power supply voltage : 3.0 V to 5.5 V Operating frequency : 400 kHz (Max) Two-wire serial interface : Fully controllable by two ports: serial clock (SCL) and serial data (SDA). Operating temperature range : 40 C to + 85 C Data retention : 10 years ( + 85 C) 10 Read/Write endurance : 10 times Package : Plastic / SOP, 8-pin (FPT-8P-M02) Low power consumption : Operating current 80 A (Max: 400 kHz), Standby current 5 A (Typ) Copyright2011 FUJITSU SEMICONDUCTOR LIMITED All rights reserved 2011.10MB85RC16V PIN ASSIGNMENT (TOP VIEW) NC 1 8 VDD 2 7 NC WP NC 3 6 SCL VSS 4 5 SDA (FPT-8P-M02) PIN FUNCTIONAL DESCRIPTIONS Pin Pin Name Functional Description Number No Connect pins 1 to 3 NC Leave it unconnected. 4 VSS Ground pin Serial Data I/O pin This is an I/O pin of serial data for performing bidirectional communication of mem- 5SDA ory address and writing or reading data. It is possible to connect some devices. It is an open drain output, so a pull-up resistance is required to be connected to the external circuit. Serial Clock pin 6SCL This is a clock input pin for input/output timing serial data. Data is sampled on the rising edge of the clock and output on the falling edge. Write Protect pin When Write Protect pin is H level, writing operation is disabled. When Write Pro- tect pin is L level, the entire memory region can be overwritten. Reading operation 7WP is always enabled regardless of the Write Protect pin state. The write protect pin is internally pulled down to the VSS pin and that is recognized as the L level (write enabled) when the pin is the open state. 8 VDD Supply Voltage pin 2 DS501-00010-2v0-E