GLS85VM1008C (100-ball) Industrial Temp eMMC N ANDri ve MX Series Factsheet 03.000 February 2021 Features Industry Standard Embedded MultiMediaCard Integrated Voltage Detector (eMMC) Host Interface Detects supply voltage fluctuations and JEDEC/MMC Standard Version 5.1 generates reset during power-up and power- JESD84-B51 compliant down to prevent inadvertent writes Backward compatible with previous eMMC Expanded Data Protection standards Hardware Write Protection pin Performance Data sanitization eMMC clock speed: Up to 200MHz Latency Management eMMC data bus width: x1/x4/x8 Reduces latency due to background operation Supports Dual Data Rate mode during time critical read/write operations Supports HS200 / HS400 modes Supports SMART and TRIM Commands Sequential data read: Up to 145 MByte/sec* Robust Built-in ECC Sequential data write: Up to 31 MByte/sec* NAND Configuration * Measured in HS400 enhanced mode using 1 MByte 2 bits per cell (MLC) transfer size Endurance Power Management 5K program/erase (P/E) cycles 3.3V power supply (V ) CC Operating Temperature Range 3.3V or 1.8V eMMC IO voltage (V ) CCQ Industrial: -40C to 85C Immediate disabling of unused circuitry 100-ball LBGA Package without host intervention Power Consumption 14.0 mm x 18.0 mm x 1.40 mm, 1.0 mm ball pitch, LFWE Active mode: 471mW (typical) All Devices are RoHS Compliant Sleep mode: 0.5mW (typical) Product Description The GLS85VM1008C eMMC NANDrive MX Series The integrated NAND flash controller with built-in devices (referred to as eMMC NANDrive in this advanced NAND management firmware communicates factsheet) are fully integrated solid state drives. They with the host through the standard eMMC protocol. It combine an advanced Greenliant NAND controller does not require any additional or proprietary software and 8 GBytes of NAND flash memory in a multi-chip such as the Flash File System (FFS) and Memory package. These products are ideal for solid state Technology Driver (MTD). mass storage in embedded and portable applications eMMC NANDrives advanced NAND management that require small form-factor, energy efficient and technology enhances data security, improves reliable data storage. endurance and accurately tracks the usage of the eMMC solid state drives are widely used in GPS and NAND flash. This innovative technology combines telematics, in-vehicle infotainment, portable and robust error correction capabilities with advanced industrial computers, handheld data collection wear-leveling algorithms and bad block management scanners, point-of-sale terminals, networking and to extend the life of the product. telecommunications equipment, robotics, audio and eMMC NANDrive supports Single Data Rate (SDR) video recorders, monitoring devices and set-top boxes. and Dual Data Rate (DDR) modes, HS200 mode, eMMC NANDrive provides complete eMMC solid state HS400 mode, boot, multiple partitions, permanent and drive (SSD) functionality and compatibility in a 14mm partial write protect, Replay Protected Memory Block x 18mm BGA package for easy, space saving (RPMB) access, Sanitize and TRIM, hardware reset mounting to a system motherboard. With its small size, and other features detailed in the eMMC 5.1 standard low power consumption, strong security, reliability and specification. It is backward compatible with previous ruggedness, eMMC NANDrive surpasses removable eMMC standards. storage and discrete NAND-based products. These specifications are subject to change without notice. 02/12/2020 2021 Greenliant 1 S71458-01 GLS FS0019 Rev. 00 GLS85VM1008C (100-ball) Industrial Temp eMMC N ANDri ve MX Series Factsheet 03.000 February 2021 1.0 GENERAL DESCRIPTION Each eMMC NANDrive contains an integrated eMMC NAND flash memory controller and NAND flash die in a BGA package. Refer to Figure 2-1 for the eMMC NANDrive block diagram. 1.1 Optimized eMMC NANDrive 1.1.5 Error Correction Code (ECC) The heart of the eMMC NANDrive is the eMMC NAND The ECC technology uses advanced algorithms to flash memory controller, which translates standard detect and correct errors, ensuring data integrity and eMMC signals into flash media data and control extending the SSD lifespan. signals. The following components contribute to the eMMC NANDrives operation. 1.1.6 Serial Communication Interface (SCI) 1.1.1 Microcontroller Unit (MCU) The Serial Communication Interface (SCI) is designed for error reporting. During the product development The MCU transfers the eMMC commands into data stage, it is recommended to provide the SCI port on and control signals required for flash media operation. the PCB to aid in design validation. 1.1.2 Internal Direct Memory Access (DMA) 1.1.7 Multi-tasking Interface The eMMC NANDrive uses internal DMA allowing instant data transfer from/to buffer to/from flash media. The multi-tasking interface enables fast, sequential This implementation eliminates microcontroller write performance by allowing concurrent Read, overhead associated with the traditional, firmware- Program and Erase operations to multiple flash media. based approach, thereby increasing the data transfer 1.2 SMT Reflow Consideration rate. The eMMC NANDrive family utilizes standard NAND 1.1.3 Power Management Unit (PMU) flash for data storage. Because the high temperature The PMU controls the power consumption of the in a surface-mount reflow soldering process may alter eMMC NANDrive. The PMU dramatically reduces the the content on NAND flash, it is recommended to power consumption of the eMMC NANDrive by putting program the eMMC NANDrive after the reflow process. the part of the circuitry that is not in operation into Sleep mode. 1.3 Advanced NAND Management The Flash File System handles inadvertent power eMMC NANDrives integrated controller uses interrupts and has auto-recovery capability to ensure advanced wear-leveling algorithms to substantially the eMMC NANDrives data integrity. increase the longevity of NAND flash media. Wear caused by data writes is evenly distributed in all or 1.1.4 Embedded Flash File System select blocks in the device that prevents hot spots in The embedded flash file system is an integral part of locations that are programmed and erased extensively. the eMMC NANDrive. It is integrated in the controllers This effective wear-leveling technique results in firmware that performs the following tasks: optimized device endurance, enhanced data retention 1. Manages and optimizes the data access of flash and higher reliability required by long-life applications. media 2. Provides flash media wear leveling to spread flash writes across all memory address space to increase the longevity of flash media 3. Keeps track of the data file structure 4. Manages system security for the selected protection zones These specifications are subject to change without notice. 02/12/2020 2021 Greenliant 2 S71458-01 GLS FS0019 Rev. 00