Datasheet Revision 1.2 3GBit/s Digital INAP375T Automotive Pixel Link INAP375TAQ Transmitter Features: The INAP375T together with an APIX2 receiver device Backwards compatibility with APIX1 offers the next generation high speed digital serial link for 500 MBit/s, 1 GBit/s and 3 GBit/s sustained DISPLAY and CAMERA applications. It provides a downstream link bandwidth for video data DC-balanced, AC coupled low latency, point-to-point link rates up to 2591 MBit/s over shielded twisted pair (STP) cables. Its scalable up to 187.5 MBit/s upstream link bandwidth physical layer provides bandwidth of up to 3 GBit/s at Supports 2 independent video streams lowest EMI. The INAP375T supports popular automotive Configurable video interface displays with video resolutions such as 1600x600 pixels Parallel RGB (10,12,18 or 24 Bit) and refresh rates of up to 100Hz. The device offers a 1 OpenLDI compliant LVDS interface with flexible video interface, configurable to handle 1 or 2 Single Pixel Format (18 or 24 Bit) independent video streams, with input interfaces such as Parallel Bulk Data Mode (10,12,18,24 Bit) parallel RGB (1x24 Bit or 2x10 Bit) or openLDI (LVDS) Video resolutions up to HD resolutions e.g. 2x (4 lanes + clock). Software adjustable driver Configurable full duplex communication characteristics and configurable operating modes allow the channel for up to 2 receivers (daisy chain) transmission of 3 GBit/s at distances of up to 12m over a Media Independent Interface single pair of wires. In addition to the video transmission the INAP375T provides completely independent Full SPI data interfaces Duplex Communication channels. Using the internal IC Master interface AShell protocol, data transfers are protected by error GPIOs for direct signalling and camera detection and retransmission mechanisms. Offering a synchronization support Media Independent Interface (MII), the INAP375T can be Embedded AShell directly connected to an ethernet Media Access Controller, IS Audio interface offering full network capabilities through the APIX link. supports 16/24/32 Bit word length Additionally, the link is optimized to carry low latency GPIO supports up to 192kHz sampling signals for reset or synchronization purposes. The built-in TDM support for up to 8 channels audio path allows synchronous transmission of up to Diagnostic Features: 4 stereo audio channels, with highly precise clock regener- Built-In PRBS Generator ation at the receiver for high-end rear-seat entertainment Embedded diagnostics applications. Up to 12m distance at 3 GBit/s Applications: Packages: Central Information Displays 100 pin LQFP Round View Camera Systems 104 pin AQFN Head up Displays Cluster Displays Temperature/Quality: Rear-Seat Entertainment Systems -40C to +105C Stereo Camera Systems AEC-Q100 Rear View Camera Systems Sensor Fusion Systems Automotive Driver Assistance Surveillance Systems Inspection Systems DS INAP375T Revision 1.2 Inova Semiconductors Confidential Page 1 of 37Mux Mux Datasheet 1.0 Characteristics Integrity support 2xLVDS Video 2x parallel FIFO video APIX FIR FIFO Downstream Framer Serializer Audio I2S Audio MCLK GPIO GPIOs I2C Dev. I2C M I2C EEPROM Deserializer AShell APIX CML Deframer Upstream MII / Ethernet Nibble Data SPI M Configuration, Reset Osc. VCO EEPROM Control, Status Data SPI S Configuration Reset 10MHz Figure 1-1: INAP375T Block Diagramm 1.1 Absolute Maximum Ratings The absolute maximum ratings define values beyond which damage to the device may occur. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. The functional operation of the device at these or any other conditions beyond the recommended operating ratings is not guaranteed. Parameter Symbol Min. Max. Units Note V , DVDD DC Supply Voltage V -0.5 5.0 V DVDD XTAL, V AVDD LD V , V , VDD AVDD Input Voltage V -0.5 3.0 V AVDD LVDS, V VDD XTAL I/O Current (DC or transient any pin) I -20 +20 mA D Storage Temperature T -55 +150 C stg Max Soldering Temperature T / T 260 C 40 seconds maximum SLD SLD Table 1-1: Absolute maximum ratings DS INAP375T Revision 1.2 Inova Semiconductors Confidential Page 2 of 37 Phase alignment