DK-ACB-10AX1152AES Intel

Intel Programmable Acceleration Card (PAC) with Intel Arria 10 GX FPGA Data Sheet Online Version ID: 683226 Send Feedback Version: 2020.10.26 DS-1054Contents Contents 1. Introduction .................................................................................................................. 3 2. Overview........................................................................................................................ 5 2.1. Views of the Intel PAC with Intel Arria 10 GX FPGA.....................................................5 2.2. Overview of Product Features..................................................................................6 2.2.1. Intel Arria 10 GX FPGA............................................................................... 6 2.2.2. On-Board Memory..................................................................................... 6 2.2.3. Interfaces and Dimensions .........................................................................6 2.2.4. Software.................................................................................................. 7 2.2.5. Power...................................................................................................... 7 2.2.6. CPLD....................................................................................................... 7 2.2.7. QSFP+ .................................................................................................... 7 2.2.8. Control and Support...................................................................................8 3. System Compatibility ................................................................................................... 10 4. Mechanical Information ............................................................................................... 12 4.1. Air Duct Disassembly............................................................................................14 5. Thermal Specifications .................................................................................................16 5.1. Thermal Test Performance Results..........................................................................16 6. FPGA Interface Manager .............................................................................................. 18 6.1. Updating the FIM ................................................................................................ 18 7. Board Management Controller...................................................................................... 19 7.1. Features.............................................................................................................19 7.1.1. BMC Voltage and Thermal Handling............................................................ 20 7.2. Device Peripheral Table.........................................................................................20 7.3. Updating the BMC Configuration and Firmware.........................................................22 8. PLDM Commands for the Board Management Controller............................................... 23 2 8.1. I C/SMBus Address ............................................................................................. 23 8.2. Supported SMBus Commands................................................................................23 8.3. Supported MCTP Commands..................................................................................23 8.3.1. MCTP Control Messages............................................................................ 23 8.4. Supported PLDM Commands..................................................................................24 8.4.1. PLDM Base Specification Commands...........................................................24 8.4.2. PLDM for Platform Monitoring and Control Specification Commands................ 24 8.5. Defined Platform Descriptor Records.......................................................................24 8.6. Sensor and Threshold Information..........................................................................26 A. Regulatory Information................................................................................................ 27 B. References....................................................................................................................33 C. Revision History............................................................................................................34 Intel Programmable Acceleration Card (PAC) with Intel Arria 10 GX FPGA Send Feedback Data Sheet 2