solution brief Functional Safety Qualified Functional Safety Data Package Reduce Development Time, System Complexity, and Certicfi ation Risk Summary Safety Data Package Industrial automation, transportation, the smart grid, automotive, military, Contents: aerospace, and medical require machinery and products are highly reliable, and Silicon Integration How certified for functional safety. Safety is a central requirement when you develop to qualify devices using the machinery that must comply with worldwide established safety standards such as reliability report IEC 61508 and ISO 26262. Tools and Tool Flow How When you develop a safe product, you need to consider safety as a core system to use Intel Quartus Prime functionality. Design challenges include: software and develop FPGAs Adopting quality management standards, a safe design methodology, and according to IEC 61508 safety concepts Suggested RTL coding Accounting for additional project effort (time and technology), resulting in guidelines for FPGA longer time to market and higher cost of ownership development Diagnostic IP with IEC 61508 documentation and source Impact of Functional Safety code: single event upset (SEU) test, clock check, and cyclic Typical design steps to develop an application, before safety: redundancy check (CRC) test Architecture Component Application Design Integration modules Release Development Selection Implementation and Test Intel Quartus Prime Standard If you add some of the required steps to design a safe application and achieve software version 17.0.2 functional safety certification (in yellow), you can see the significant project Intel-qualified devices up to complexity: Cyclone V, Cyclone IV, Arria V, Safety Validation, Component Application Safety/ and Stratix V FPGAs and MAX Project Startup, Architecture Component Integration Safety Requirements Verification IP and Tools Design Diagnostic Certification Release Risk Analysis Development Selection and Test Validation Specification Plan Qualification Implementation Functions 10, MAX V, MAX II and MAX II Z CPLDs Having immediate access to qualified semiconductor data, intellectual property (IP), Intel IP including Nios II development flows, and design tools from Intel can significantly shorten overall embedded processor project time by one and one half to two years: The latest FPGA device Safety Validation, Application Project Startup, Architecture Component Integration Safety 18-24 Month Requirements Verification Design Certification Release Risk Analysis Development Selection and Test Validation Time Savings reliability report Specification Plan Implementation Component IP and Safety/Diagnostic Altera Tools Qualification Functions CertificateSolution Brief Functional Data Safety Package Accelerating Development Intel FPGAs Provide Flexible To simplify and speed up the certification process for faster Safety Solutions time to market, we worked with TV Rheinland and obtained Figure 1 illustrates a typical industrial controller application. approval for Altera FPGA devices, IP, our established safety It integrates standard (non-safe) and safety functions with FPGA design flow, and development tools for safety designs very few board components using FPGA devices, such as up to Safety Integrity Level 3 (SIL3). This certification means the Intel Cyclone FPGA, and a soft processor core, such as that our tools, methodologies, and devices are sufficiently the Nios II processor. In this example, all three embedded free of systematic errors. controllers are Nios II soft-core processors, each with an individual custom peripheral set. INTEL FUNCTIONAL SAFETY DATA PACKAGE CONTENTS With such a safety-focused architecture for a SIL3 certified FUNCTIONAL DATA BENEFIT application, you can reduce the total cost of ownership, SAFETY PACKAGE design footprint, and power consumption while meeting the Intel FPGA Development Qualified, safe design methodology global requirements for functional safety. Methodology Architectures where safety typically is an after-thought often Intel FPGA development Qualified tools tools use bolt-on safety option boards and dual microcontroller units (MCUs) that detect system failures. Using an option Shorter design time, faster debug for Intel IP card significantly increases costs. Integrating a SIL3 safe safety architecture solution in a pre-qualified FPGA with standard application Shorter design time, faster debug for Diagnostice IP functions on the main board not only lowers the safety safety architecture cost footprint, but it also enhances system flexibility and Device reliability reports, Simplifies risk analysis, failuures in shortens development time. It is designed with safety as a guidelines time (FIT) calculation core system functionality in mind. Formatted in compliance Seamless integration into product If you are concerned about the lack of flexibility, long with IEC 61508 documentation development times, or device certification issues that come with traditional safety architectures, Intel FPGAs are the ideal solution. Figure 1. A Typical SIL3 Industrial Safe System Encoder / Sensor FPGA Encoder Interface Safety I/O Safety I/O Motor Safety Custom Safety Controller 2 Logic Controller Controller 1 Application Custom Fieldbus / IE Processor PWM Controller TV Rheinland Certificate No. 968/EL 850.00/12 Fieldbus / Drive Power Circuit Industrial Ethernet Product Order Numbers Functional Safety Data Package: IP-ABG-SafetyDP5 Learn More Annual Renewal: IPR-ABG-SafetyDP5 For more information on developing IEC 61508 systems with Intel FPGAs and the Functional Safety Data Package, please contact your local Intel representitive, the nearest distributors sales office or visit the Functional Safety page at www.Intel.com/safety. Tests measure performance of components on a particular test, in specific systems. Differences in hardware, software, or configuration will affect actual performance. Consult other sources of information to evaluate performance as you consider your purchase. For more complete information about performance and benchmark results, visit www.intel.com/benchmarks. Intel Corporation. Intel, the Intel logo, the Intel Inside mark and logo, the Intel. Experience Whats Inside mark and logo, Altera, Arria, Cyclone, Enpirion, Intel Atom, Intel Core, Intel Xeon, MAX, Nios, Quartus and Stratix are trademarks of Intel Corporation or its subsidiaries in the U.S. and/or other countries. See Trademarks on intel.com for full list of Intel trademarks. SS-1033-4.0 *Other names and brands may be claimed as the property of others. 2