SW-OPENCL-SDK Intel

Intel FPGA SDK for OpenCL Pro Edition Programming Guide Updated for Intel Quartus Prime Design Suite: 20.2 Subscribe UG-OCL002 2020.06.22 Send Feedback Latest document on the web: PDF HTMLContents Contents 1. Intel FPGA SDK for OpenCL Overview......................................................................... 7 1.1. Intel FPGA SDK for OpenCL Pro Edition Programming Guide Prerequisites......................7 1.2. Intel FPGA SDK for OpenCL FPGA Programming Flow..................................................8 2. Intel FPGA SDK for OpenCL Offline Compiler Kernel Compilation Flows........................ 10 2.1. One-Step Compilation for Simple Kernels................................................................ 11 2.2. Multistep Intel FPGA SDK for OpenCL Pro Edition Design Flow.................................... 12 3. Obtaining General Information on Software, Compiler, and Custom Platform...............16 3.1. Displaying the Software Version (version)............................................................... 16 3.2. Displaying the Compiler Version (-version).............................................................. 17 3.3. Listing the Intel FPGA SDK for OpenCL Utility Command Options (help).......................17 3.3.1. Displaying Information on an Intel FPGA SDK for OpenCL Utility Command Option (help <command option>)............................................................. 17 3.4. Listing the Intel FPGA SDK for OpenCL Offline Compiler Command Options (no argument, -help, or -h)......................................................................................17 3.5. Listing the Available FPGA Boards and Custom Platforms (-list-boards and -list- board-packages)...............................................................................................18 3.6. Displaying the Compilation Environment of an OpenCL Binary (env)........................... 19 4. Managing an FPGA Board.............................................................................................. 20 4.1. Installing an FPGA Board (install)...........................................................................21 4.2. Uninstalling an FPGA Board (uninstall)....................................................................23 4.3. Querying the Device Name of Your FPGA Board (diagnose)........................................ 23 4.4. Running a Board Diagnostic Test (diagnose <device name>).....................................24 4.5. Programming the FPGA Offline or without a Host (program <device name>)...............24 4.6. Programming the Flash Memory (flash <device name>)...........................................24 5. Structuring Your OpenCL Kernel................................................................................... 26 5.1. Guidelines for Naming the Kernel........................................................................... 26 5.2. Programming Strategies for Optimizing Data Processing Efficiency..............................27 5.2.1. Unrolling a Loop (unroll Pragma) ............................................................28 5.2.2. Disabling Pipelining of a Loop (disable loop pipelining Pragma) .......... 29 5.2.3. Coalescing Nested Loops...........................................................................29 5.2.4. Fusing Adjacent Loops (loop fuse Pragma)...............................................31 5.2.5. Marking Loops to Prevent Automatic Fusion (nofusion Pragma)................... 32 5.2.6. Specifying a Loop Initiation interval (II)...................................................... 33 5.2.7. Loop Concurrency (max concurrency Pragma) .........................................34 5.2.8. Loop Speculation (speculated iterations Pragma) ............................... 35 5.2.9. Loop Interleaving Control (max interleaving Pragma)..............................36 5.2.10. Floating Point Optimizations (fp contract and fp reassoc Pragma)........ 38 5.2.11. Specifying Work-Group Sizes................................................................... 39 5.2.12. Specifying Number of Compute Units........................................................ 40 5.2.13. Specifying Number of SIMD Work-Items....................................................41 5.2.14. Specifying the private copies Memory Attribute....................................41 5.2.15. Specifying the stall enable Cluster-control Attribute ............................. 42 5.3. Programming Strategies for Optimizing Pointer-to-Local Memory Size......................... 43 5.4. Implementing the Intel FPGA SDK for OpenCL Channels Extension............................. 44 Intel FPGA SDK for OpenCL Pro Edition: Programming Guide Send Feedback 2