IS25LP512M IS25WP512M 512Mb SERIAL FLASH MEMORY 133/112MHZ MULTI I/O SPI & QUAD I/O QPI DTR INTERFACE IS25LP512M IS25WP512M 512Mb S ERIAL FLASH MEMORY 133/112MHZ MULTI I/O SPI & Q UAD I/O QPI DTR INTERFACE FEATURES Industry Standard Serial Interface Low Power with Wide Temp. Ranges - Single Voltage Supply - IS25LP512M: 512Mbit/64Mbyte IS25LP: 2.30V to 3.60V - IS25WP512M: 512Mbit/64Mbyte IS25WP: 1.70V to 1.95V - 3 or 4 Byte Addressing Mode - 13 mA Active Read Current - Supports Standard SPI, Fast, Dual, Dual - 21 A Standby Current I/O, Quad, Quad I/O, SPI DTR, Dual I/O - 1 A Deep Power Down DTR, Quad I/O DTR, and QPI - Temp Grades: - Software & Hardware Reset Extended: -40C to +105C - Supports Serial Flash Discoverable Auto Grade (A3): -40C to +125C Parameters (SFDP) Advanced Security Protection High Performance Serial Flash (SPI) - Software and Hardware Write Protection - Advanced Sector/Block Protection - 50MHz Normal Read - Top/Bottom Block Protection - Up to133Mhz Fast Read: - Power Supply Lock Protection 133MHz (max) for 3.0V - 4x256 Byte Dedicated Security Area 112MHz (max) for 1.8V with OTP User-lockable Bits - Up to 66MHz DTR (Dual Transfer Rate) - 128 bit Unique ID for Each Device - Equivalent Throughput of 532 Mb/s (Call Factory) - Selectable Dummy Cycles - Configurable Drive Strength (1) Industry Standard Pin-out & Packages - Supports SPI Modes 0 and 3 (2) - M =16-pin SOIC 300mil - More than 100,000 Erase/Program Cycles (2) - L = 8-contact WSON 8x6mm - More than 20-year Data Retention (2) - G = 24-ball TFBGA 6x8mm (4x6 ball array) (2) - H = 24-ball TFBGA 6x8mm (5x5 ball array) Flexible & Efficient Memory Architecture - Chip Erase with Uniform Sector/Block Notes: (2) Erase (4/32/64KB or 4/32/256 KB) 1. Call Factory for other package options available. (2) - Program 1 to 256 or 512 Byte per Page 2. For optional 512 Byte Page size with 256 KB Block size, see the Ordering Information. - Program/Erase Suspend & Resume Efficient Read and Program modes - Low Instruction Overhead Operations - Continuous Read 8/16/32/64 Byte Burst Wrap - Selectable Burst Length - QPI for Reduced Instruction Overhead - Data Learning Pattern for training in DTR operation Integrated Silicon Solution, Inc.- www.issi.com 2 Rev.A5 04/28/2021