CPC5710N Phone Line Monitor (PLM) IC INTEGRATED CIRCUITS DIVISION Features Description Excellent common-mode rejection ratio (CMRR) The CPC5710N is a selectable dual function CMOS Application circuits can meet isolation requirements special purpose integrated high-impedance input, of worldwide telephony standards fixed-gain amplifier and an internally set voltage level Small 8-pin SOIC comparator for telephone line monitoring. The high Worldwide telephone network compatibility (>40dB) common-mode rejection ratio makes the Full-wave ringing level detector comparator with CPC5710N an excellent choice for signaling detection, internal threshold, large hysteresis, and logic-level line condition monitoring, discrete voice recording and output CID buffering applications. In addition to voice 3.3V or 5V operation applications, the CPC5710N is ideal for data High differential input impedance applications such as embedded modem designs Very low common-mode input impedance utilized in broadband set-top boxes. Fixed gain Differential or single-ended linear output Ordering Information TTL logic level input CMOS logic level output (TTL compatible) Part Number Description Virtually non-detectable in voice monitoring applications CPC5710N PLM IC, Tubed, 100/Tube CPC5710NTR PLM IC, Tape &Reel, 2000/Reel Applications Pb The CPC5710N can be used for line monitoring or e3 detection of signaling states and loop conditions such as: Display feature (caller ID) signal buffering Line-In-Use (LIU) detection Ringing signal with adjustable detection level Battery presence monitoring Tip to ring line voltage monitoring Line polarity Imperceptible voice recording CPC5710N Block Diagram V DD 50k V DD 3 LIN/CMP 1 V + DD - 2 CMPOUT V DD 1.625V - + 6 0V 5 + IN+ LINOUT+ + A=6 V 2V 7 4 - IN- - LINOUT- Switch shown in Detector Mode V SS 8 + GND - 1.25V GND DS-CPC5710-R03 www.ixysic.com 1CPC5710N INTEGRATED CIRCUITS DIVISION 1. Specifications 3 1.1 Package Pinout . 3 1.2 Pin Description . 3 1.3 Absolute Maximum Ratings . 3 1.4 Recommended Operating Environment 3 1.5 Electrical Characteristics 4 1.5.1 AC Characteristics . 4 1.5.2 Detector Threshold Characteristics 4 1.5.3 LIN/CMP Input Characteristics 4 1.5.4 Power Characteristics 4 2. Using CPC5710N 5 2.1 LIN/CMP Input . 5 2.2 Amplifier Design Considerations 5 2.2.1 Linear Amplifier Gain . 5 2.3 Detector Considerations 5 2.3.1 Ringing Signal Detection 5 2.3.2 Setting Ringing Detection Threshold . 5 2.4 Power Quality 6 3. Applications . 7 3.1 Line-In-Use (LIU) and Line Polarity Detector 7 3.2 Non-Intrusive Line Monitoring, Display Feature (Caller ID) Signal Reception, and Ringing Detection Application . 8 3.2.1 Frequency Response . 8 3.3 Regulatory Issues . 8 4. Manufacturing Information . 9 4.1 Moisture Sensitivity 9 4.2 ESD Sensitivity . 9 4.3 Reflow Profile 9 4.4 Board Wash . 9 4.5 Mechanical Dimensions . 10 4.5.1 CPC5710N 8-Pin SOIC Package . 10 4.5.2 CPC5710NTR Tape and Reel Specifications . 10 2 www.ixysic.com R03