VVZ40-12io1 3~ Thyristor Module Rectifier V = 1200 V RRM I 45 A = DAV A I = 320 FSM 3~ Rectifier Bridge, half-controlled (high-side) Part number VVZ40-12io1 Backside: isolated 8 4 7 5 2 1 6 3 Features / Advantages: Applications: Package: V1-B-Pack Package with DCB ceramic base plate Line rectifying 50/60 Hz Isolation Voltage: V~ 3600 Improved temperature and power cycling Drives Industry standard outline Planar passivated chips SMPS RoHS compliant Very low forward voltage drop UPS Soldering pins for PCB mounting Very low leakage current Height: 10 mm Base plate: DCB ceramic Reduced weight Advanced power cycling Disclaimer Notice Information furnished is believed to be accurate and reliable. However, users should independently evaluate the suitability of and test each product selected for their own applications. Littelfuse products are not designed for, and may not be used in, all applications. Read complete Disclaimer Notice at www.littelfuse.com/disclaimer-electronics. IXYS reserves the right to change limits, conditions and dimensions. Data according to IEC 60747and per semiconductor unless otherwise specified 20200117f 2020 IXYS all rights reservedVVZ40-12io1 Ratings Rectifier Symbol Definition Conditions min. typ. max. Unit T = 25C 1300 V V max. non-repetitive reverse/forward blocking voltage RSM/DSM VJ T = 25C 1200 V V max. repetitive reverse/forward blocking voltage RRM/DRM VJ I reverse current, drain current V = 1 2 0 0 V T = 25C 300 A R/D R/D VJ V = 1 2 0 0 V T = 1 2 5 C 5 mA R/D VJ forward voltage drop V I = 1 5 A T = 25C 1.12 V T T VJ I = 4 5 A 1.47 V T T = C 1.07 V I = 1 5 A 125 T VJ I = 4 5 A 1.52 V T bridge output current T = 1 0 0 C T = 1 2 5 C 45 A I DAV C VJ rectangular d = V T = 1 2 5 C 0.85 V threshold voltage T0 VJ for power loss calculation only slope resistance r 15 m T 1 K/W R thermal resistance junction to case thJC thermal resistance case to heatsink R 0.6 K/W thCH P total power dissipation T = 25C 100 W tot C max. forward surge current t = 10 ms (50 Hz), sine T = 45C 320 A I TSM VJ t = 8,3 ms (60 Hz), sine V = 0 V 345 A R t = 10 ms (50 Hz), sine T = 1 2 5 C A 270 VJ t = 8,3 ms (60 Hz), sine V = 0 V 295 A R value for fusing It t = 10 ms (50 Hz), sine T = 45C 510 As VJ t = 8,3 ms (60 Hz), sine V = 0 V 495 As R t = 10 ms (50 Hz), sine T = 1 2 5 C 365 As VJ t = 8,3 ms (60 Hz), sine V = 0 V 360 As R junction capacitance V = 4 0 0 V f = 1 MHz T = 25C 16 pF C J R VJ P max. gate power dissipation t = 30 s T = 1 2 5 C 10 W GM P C t = 300 s 1 W P 0.5 W P average gate power dissipation GAV critical rate of rise of current T = 125C f = 50 Hz repetitive, I = 45 A 150 (di/dt) A/s cr VJ T 0.3 t = 2 0 0 s di /dt = A/s P G I = 0.3A V = V non-repet., I = 15 A 500 A/s G DRM T critical rate of rise of voltage V = V T = 125C 1000 V/s (dv/dt) VJ cr DRM R = method 1 (linear voltage rise) GK gate trigger voltage V V = 6 V T = 25C 1 V GT D VJ T = -40C 1.2 V VJ gate trigger current V = 6 V T = 25C 65 mA I VJ GT D T = -40C 80 mA VJ gate non-trigger voltage V V = V T = 125C 0.2 V GD D DRM VJ gate non-trigger current I 5 mA GD latching current t = 30 s T = 25C 150 mA I VJ L p I = 0.3A di /dt = 0.3 A/s G G holding current I V = 6 V R = T = 25C 100 mA H D GK VJ gate controlled delay time t V = V T = 25C 2 s VJ gd D DRM I = 0.3A di /dt = 0.3 A/s G G turn-off time V = 100 V I = 15A V = V T =100 C 150 s t q R T DRM VJ di/dt = 10 A/s dv/dt = 20 V/s t = 300 s p IXYS reserves the right to change limits, conditions and dimensions. Data according to IEC 60747and per semiconductor unless otherwise specified 20200117f 2020 IXYS all rights reserved