VVZB120-16ioX 3~ Brake Thyristor Module Rectifier Chopper V = 1600 V V = 1200 V RRM CES I 180 A I 180 A = = DAV C25 A V I = 700 V = 1.7 FSM CE(sat) 3~ Rectifier Bridge, half-controlled (high-side) + Brake Unit Part number VVZB120-16ioX Backside: isolated O1 S1 E1 I1 M1 W1 L7 G7 C7 O10 W10 Features / Advantages: Applications: Package: V2-Pack Package with DCB ceramic base plate 3~ Rectifier with brake unit Isolation Voltage: V~ 3600 Improved temperature and power cycling for drive inverters Industry standard outline Planar passivated chips RoHS compliant Very low forward voltage drop Soldering pins for PCB mounting Very low leakage current Height: 17 mm X2PT - 2nd generation Xtreme light Punch Through Base plate: DCB ceramic Rugged X2PT design results in: Reduced weight - short circuit rated for 10 sec. Advanced power cycling - very low gate charge - low EMI - square RBSOA 2x Ic Thin wafer technology combined with X2PT design results in a competitive low VCE(sat) and low thermal resistance Disclaimer Notice Information furnished is believed to be accurate and reliable. However, users should independently evaluate the suitability of and test each product selected for their own applications. Littelfuse products are not designed for, and may not be used in, all applications. Read complete Disclaimer Notice at www.littelfuse.com/disclaimer-electronics. IXYS reserves the right to change limits, conditions and dimensions. Data according to IEC 60747and per semiconductor unless otherwise specified 20191220g 2019 IXYS all rights reservedVVZB120-16ioX Ratings Rectifier Symbol Definition Conditions min. typ. max. Unit T = 25C 1700 V V max. non-repetitive reverse/forward blocking voltage RSM/DSM VJ T = 25C 1600 V V max. repetitive reverse/forward blocking voltage RRM/DRM VJ I reverse current, drain current V = 1 6 0 0 V T = 25C 50 A R/D R/D VJ V = 1 6 0 0 V T = 1 5 0 C 20 mA R/D VJ forward voltage drop V I = 6 0 A T = 25C 1.27 V T T VJ I = 1 8 0 A 1.90 V T T = C 1.25 V I = 6 0 A 125 T VJ I = 1 8 0 A 2.04 V T bridge output current T = 8 5 C T = 1 5 0 C 180 A I DAV C VJ rectangular d = V T = 1 5 0 C 0.83 V threshold voltage T0 VJ for power loss calculation only slope resistance r 6.9 m T 0.5 K/W R thermal resistance junction to case thJC thermal resistance case to heatsink R 0.1 K/W thCH P total power dissipation T = 25C 250 W tot C max. forward surge current t = 10 ms (50 Hz), sine T = 45C 700 A I TSM VJ t = 8,3 ms (60 Hz), sine V = 0 V 755 A R t = 10 ms (50 Hz), sine T = 1 5 0 C A 595 VJ t = 8,3 ms (60 Hz), sine V = 0 V 645 A R value for fusing It t = 10 ms (50 Hz), sine T = 45C 2.45 kAs VJ t = 8,3 ms (60 Hz), sine V = 0 V 2.37 kAs R t = 10 ms (50 Hz), sine T = 1 5 0 C 1.77 kAs VJ t = 8,3 ms (60 Hz), sine V = 0 V 1.73 kAs R junction capacitance V = 4 0 0 V f = 1 MHz T = 25C 54 pF C J R VJ P max. gate power dissipation t = 30 s T = 1 5 0 C 10 W GM P C t = 300 s 5 W P 0.5 W P average gate power dissipation GAV critical rate of rise of current T = 150C f = 50 Hz repetitive, I = 180 A 150 (di/dt) A/s cr VJ T 0.45 t = 2 0 0 s di /dt = A/s P G I = 0.45A V = V non-repet., I = 60 A 500 A/s G DRM T critical rate of rise of voltage V = V T = 150C 1000 V/s (dv/dt) VJ cr DRM R = method 1 (linear voltage rise) GK gate trigger voltage V V = 6 V T = 25C 1.5 V GT D VJ T = -40C 1.6 V VJ gate trigger current V = 6 V T = 25C 95 mA I VJ GT D T = -40C 200 mA VJ gate non-trigger voltage V V = V T = 150C 0.2 V GD D DRM VJ gate non-trigger current I 10 mA GD latching current t = 10 s T = 25C 450 mA I VJ L p I = 0.45A di /dt = 0.45 A/s G G holding current I V = 6 V R = T = 25C 200 mA H D GK VJ gate controlled delay time t V = V T = 25C 2 s VJ gd D DRM I = 0.45A di /dt = 0.45 A/s G G turn-off time V = 100 V I = 60A V = V T =125 C 150 s t q R T DRM VJ di/dt = 10 A/s dv/dt = 20 V/s t = 200 s p IXYS reserves the right to change limits, conditions and dimensions. Data according to IEC 60747and per semiconductor unless otherwise specified 20191220g 2019 IXYS all rights reserved