ispPAC-POWR1220AT8 In-System Programmable Power Supply Monitoring, Sequencing and Margining Controller September 2013 Data Sheet DS1015 Features Application Block Diagram Monitor, Control, and Margin Multiple Power Primary Supplies Supply 3.3V Simultaneously monitors up to 12 power supplies Primary Supply Provides up to 20 output control signals 2.5V Provides up to eight analog outputs for Primary Supply margining/trimming power supply voltages 1.8V Programmable digital and analog circuitry Primary Supply Power Supply Margin and Trim Functions POL 1 Trim and margin up to eight power supplies 2 Dynamic voltage control through I C Four hardware selectable voltage profiles Primary Supply Independent Digital Closed-Loop Trim function POL N for each output Other Control/Supervisory Signals Embedded PLD for Sequence Control 8 Analog 48-macrocell CPLD implements both state 16 Digital 4 MOSFET Trim Outputs Drivers Outputs machines and combinatorial logic functions Power Supply CPLD Embedded Programmable Timers Margin/Trim 48 Macrocells Control Block Four independent timers 83 Inputs 32s to 2 second intervals for timing sequences ADC 2 I C Bus 2 6 Digital I C 4 Timers CPU Analog Input Monitoring Inputs Interface ispPAC-POWR1220AT8 12 independent analog monitor inputs Differential inputs for remote ground sense Two programmable threshold comparators per Description analog input The Lattice Power Manager II ispPAC-POWR1220AT8 Hardware window comparison 2 is a general-purpose power-supply monitor, sequence 10-bit ADC for I C monitoring and margin controller, incorporating both in-system pro- High-Voltage FET Drivers grammable logic and in-system programmable analog Power supply ramp up/down control 2 functions implemented in non-volatile E CMOS tech- Programmable current and voltage output nology. The ispPAC-POWR1220AT8 device provides 12 Independently configurable for FET control or independent analog input channels to monitor up to 12 digital output power supply test points. Each of these input channels 2 2-Wire (I C/SMBus Compatible) Interface offers a differential input to support remote ground Comparator status monitor sensing, and has two independently programmable ADC readout comparators to support both high/low and in-bounds/ Direct control of inputs and outputs out-of-bounds (window-compare) monitor functions. Six Power sequence control general-purpose digital inputs are also provided for mis- Dynamic trimming/margining control cellaneous control functions. 3.3V Operation, Wide Supply Range 2.8V to The ispPAC-POWR1220AT8 provides 20 open-drain 3.96V digital outputs that can be used for controlling DC-DC In-system programmable through JTAG converters, low-drop-out regulators (LDOs) and opto- Industrial temperature range: -40C to +85C couplers, as well as for supervisory and general-pur- 100-pin TQFP package, lead-free option pose logic interface functions. Four of these outputs 2013 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice. www.latticesemi.com 1 DS1015 01.9 12 Analog Inputs and Voltage Monitors Trim/Margin Enables Voltage Monitoring Other Board Circuitry Digital Monitoring GNDD (6) 1 6 O P E N - D R A I N 4 F E T D R I V E R S D I G I T A L O U T P U T S GNDA (2) O U T P U T R O U T I N G S D A P O O L S C L R E S E T b P L D C L K M C L K A T D I T D I S E L T D I T C K T M S T D O V C C J APS VCCA VCCD (3) 1 2 A N A L O G I N P U T S 6 D I G I T A L VCCINP A N D V O L T A G E M O N I T O R S I N P U T S ispPAC-POWR1220AT8 Data Sheet (HVOUT1-HVOUT4) may be configured as high-voltage MOSFET drivers. In high-voltage mode these outputs can provide up to 12V for driving the gates of n-channel MOSFETs so that they can be used as high-side power switches controlling the supplies with a programmable ramp rate for both ramp up and ramp down. The ispPAC-POWR1220AT8 incorporates a 48-macrocell CPLD that can be used to implement complex state machine sequencing for the control of multiple power supplies as well as combinatorial logic functions. The status of all of the comparators on the analog input channels as well as the general purpose digital inputs are used as inputs by the CPLD array, and all digital outputs may be controlled by the CPLD. Four independently programmable timers can create delays and time-outs ranging from 32s to 2 seconds. The CPLD is programmed using Logi- Builder, an easy-to-learn language integrated into the PAC-Designer software. Control sequences are written to monitor the status of any of the analog input channel comparators or the digital inputs. In addition to the sequence control functions, the ispPAC-POWR1220AT8 incorporates eight DACs for generating trimming voltage to control the output voltage of a DC-DC converter. The trimming voltage can be set to four hard- 2 ware selectable preset values (voltage profiles) or can be dynamically loaded in to the DAC through the I C bus. Additionally, each power supply output voltage can be maintained typically within 0.5% tolerance across various load conditions using the Digital Closed Loop Control mode. The operating voltage profile can either be selected using external hardware pins or through the PLD outputs. 2 The on-chip 10-bit A/D converter can both be used to monitor the V voltage through the I C bus as well as for MON implementing digital closed loop mode for maintaining the output voltage of all power supplies controlled by the monitoring and trimming section of the ispPAC-POWR1220AT8 device. 2 The I C bus/SMBus interface allows an external microcontroller to measure the voltages connected to the V MON inputs, read back the status of each of the V comparator and PLD outputs, control logic signals IN2 to IN5, con- MON trol the output pins, and load the DACs for the generation of the trimming voltage of the external DC-DC converter. Figure 1. ispPAC-POWR1220AT8 Block Diagram VOLTAGE OUTPUT DACS (8) VPS0 DAC TRIM1 VPS1 TRIM2 DAC VMON1+ DAC TRIM3 MARGIN/TRIM VMON1GS ADC DAC TRIM4 VMON2+ TRIM5 DAC VMON2GS CONTROL LOGIC TRIM6 DAC VMON3+ DAC TRIM7 VMON3GS DAC TRIM8 VMON4+ VMON4GS VMON5+ HVOUT1 VMON5GS HVOUT2 VMON6+ HVOUT3 VMON6GS HVOUT4 VMON7+ VMON7GS VMON8+ OUT5/SMBA VMON8GS CPLD OUT6 VMON9+ OUT7 VMON9GS 48 MACROCELLS OUT8 VMON10+ OUT9 VMON10GS 83 INPUTS OUT10 VMON11+ OUT11 VMON11GS OUT12 VMON12+ OUT13 VMON12GS OUT14 OUT15 IN1 OUT16 IN2 OUT17 IN3 2 OUT18 CLOCK TIMERS I C IN4 JTAG LOGIC OUT19 OSCILLATOR (4) INTERFACE IN5 OUT20 IN6 2