LCMXO2280C-L-EV Lattice

MachXO Standard Evaluation Board - Revisions 001 & 002 Users Guide March 2008 Revision: EB21 01.6 MachXO Standard Evaluation Board Lattice Semiconductor Revisions 001 & 002 Users Guide Introduction The MachXO Standard Evaluation board provides a convenient platform to evaluate electrical characteristics of the MachXO device, and to evaluate, test and de-bug custom logic designs. The board features a MachXO device in a 256-ball fpBGA package. The MachXO I/Os are connected to a rich variety of interfaces, including an 8-bit input switch, LEDs, PCB test points, 0.10 general purpose headers and optional high-speed SMA connectors. The board includes selectable power for mixed core I/O voltage operation. A 33MHz oscillator, as well as an ispClock PLL synthesis device are also included on the board. Features MachXO in 256-ball ne pitch Ball Grid Array package (MachXO640 or MachXO2280) Single printed circuit board solution Eight LEDs for visual feedback 8-bit input switch General purpose push-button 1149.1 JTAG programming/boundary-scan interface Built-in power supply operating with an DC input between 5V and 20V Selectable CORE voltage for the MachXO Selectable voltages for a portion of the I/O banks Built-in adjustable oscillator for reference clocking source Lattice ispClock5610 multiple output PLL SMA connector landing pads (SMA connectors not populated) to MachXO clock input/general purpose I/O pins RJ-45 connector (not populated) LCD/GPIO footprint 100mil center-center test point grid Impedance controlled Mictor (not populated) General Description The heart of the board is the MachXO programmable logic device in a 256-ball fpBGA package. The board is designed to cover a broad range of core and I/O voltage requirements. The MachXO C grade devices require a core voltage supply between 1.5V to 3.3V and an auxiliary 3.3V supply. The E grade devices require a core volt- age supply at 1.2V and an auxiliary I/O supply at 3.3V. The MachXO Standard Evaluation Board provides three supply voltages, all sourced from a 5V to 20V external source (or sourced individually via the banana jack inputs). The board provides xed 1.2V and 3.3V power rails and a single adjustable voltage that ranges from 1.2V to 3.3V. It is possible to use external power supplies to override the xed output levels if desired. The voltage supplied to the MachXO core is selectable. The core voltage is changed by moving a single current sense resistor. Once a correct set of supply voltages has been applied to the MachXO, the device can be programmed. The MachXO can be programmed and veried with a Lattice JTAG download cable, which should be connected to the 1x10 SIP header on the board (1149.1 JTAG interface). The ispVM System software controls the programming and verication process. The ispVM System software is available for download from www.latticesemi.com/software. 2