LFE3-35EA-VERSA-EVN Lattice

LatticeECP3 Versa Evaluation Board Users Guide July 2013 Revision: EB62 01.6LatticeECP3 Versa Evaluation Board Users Guide Introduction The LatticeECP3 Versa Evaluation Board allows designers to investigate and experiment with the features of the LatticeECP3 Field-Programmable Gate Array. The features of the LatticeECP3 Versa Evaluation Board can assist engineers with rapid prototyping and testing of their specific designs. The LatticeECP3 Versa Evaluation Board is part of the LatticeECP3 Versa Development Kit. The guide is intended to be referenced in conjunction with demo users guides to demonstrate the LatticeECP3 FPGA. Figure 1. LatticeECP3 Versa Evaluation Board, Top Side GSRn & LED SERDES Test DDR3 PROGRAMn Expansion Connectors Push-buttons Display SMA Connectors Memory User Switches Status LEDs USB Programming J3 JTAG Interface J13 JTAG Interface 10/100/1000 RJ-45 Connections On-Board SPI Flash 12V DC Clock Configuration Power Input Management Memory PCI Express x1 Features Half-length PCI Express form-factor Allows demonstration of PCI Express x1 interconnection Electrical testing of one full-duplex SERDES channel via SMA connections USB-B connection for UART and device programming Two RJ45 interfaces to 10/100/1000 Ethernet to GMII On-board Boot Flash 64M Serial SPI Flash DDR3-1333 memory components (64Mb/x16) Expansion mezzanine interconnection for prototyping 14-segment alpha-numeric display Switches, LEDs and displays for demo purposes ispVM programming support On-board reference clock sources 2