LFE5UM-45F-VERSA-EVN Lattice

ECP5 Versa Evaluation Board User Guide March 2015 EB98 1.0ECP5 Versa Evaluation Board User Guide Introduction The ECP5 Versa Evaluation Board allows designers to investigate and experiment with the features of the ECP5 Field-Programmable Gate Array. The features of the ECP5 Versa Evaluation Board can assist engineers with rapid prototyping and testing of their specific designs. The ECP5 Versa Evaluation Board is part of the ECP5 Versa Development Kit. The guide is intended to be referenced in conjunction with demo users guides to demonstrate the ECP5 FPGA. Figure 1. ECP5 Versa Evaluation Board, Top Side GSRn & PROGRAMn LED SERDES Test DDR3 Push-buttons Display SMA Connectors Memory Expansion Connectors User Switches Status LEDs USB Programming SPI Flash Configuration J3 JTAG Memory Interface 1/100/1000 RJ-45 Connections On-Board 12V DC Clock Power Input Management PCI Express x1 Features Half-length PCI Express form-factor Allows demonstration of PCI Express x1 interconnection Electrical testing of one full-duplex SERDES channel via SMA connections USB-B connection for UART and device programming Two RJ45 interfaces to 10/100/1000 Ethernet to RGMII On-board Boot Flash 128M Serial SPI Flash DDR3-1866 memory components (64Mb/x16) Expansion mezzanine interconnection for prototyping 14-segment alpha-numeric display Switches, LEDs and displays for demo purposes Diamond programming support On-board reference clock sources 2