TVS Diode Arrays (SPA Diodes) General Purpose ESD Protection - SP724 Series RoHS Pb GREEN SP724 Series 3pF 8kV Diode Array Description The SP724 is a quad array of transient voltage clamping circuits designed to suppress ESD and other transient over- voltage events. The SP724 is used to help protect sensitive digital or analog input circuits on data, signal, or control lines operating on power supplies up to 20VDC. The SP724 is comprised of bipolar SCR/diode structures to protect up to four independent lines by clamping transients of either polarity to the power supply rails. The SP724 offers very low leakage (1nA Typical) and low input capacitance (3pF Typical). Additionally, the SP724 is rated to withstand the IEC 61000-4-2 ESD specification for both contact and air discharge methods to level 4. Pinout The SP724 is connected to the sensitive input line and its associated power supply lines. Clamping action occurs I/O V+ I/O during the transient pulse, turning on the diode and fast 65 4 triggering SCR structures when the voltage on the input SP724 line exceeds one V threshold above the V+ supply (or one BE (SOT-23) V threshold below the V- supply). Therefore, the SP724P BE TOP VIEW operation is unaffected by poor power supply regulation or voltage fluctuations within its operating range. 12 3 I/O V I/O Features An Array of 4 SCR/Diode Pairs in 6-Lead SOT-23 Functional Block Diagram ESD Capability per HBM Standards - IEC 61000-4-2, Direct Discharge .......... 8kV (Level 4) - IEC 61000-4-2, Air Discharge ...............15kV (Level 4) - MIL STD 3015.7 ................................................ >8kV Input Protection for Applications with Power Supplies Up to +20V (Single-Ended Voltage), and 10V (Differential Voltage) Peak Current Capability - IEC 61000-4-5 (8/20s) ....................................... 3A - Single Pulse, 100s Pulse Width ..................... 2.2A Low Input Leakage .......................................... 1nA Typical Notes: Low Input Capacitance .....................................3pF Typical 1. The design of the SP724 SCR/Diode ESD Protection Arrays are covered by Littelfuse Operating Temperature Range....................-40C to 105C patent 4567500. 2. The full ESD capability of the SP724 is achieved when wired in a circuit that includes connection to both the V+ and V- pins. When handling individual devices, follow proper procedures for electrostatic discharge. Applications Microprocessor/Logic Analog Device Input Input Protection Protection Data Bus Protection Voltage Clamp Additional Information Life Support Note: Not Intended for Use in Life Support or Life Saving Applications The products shown herein are not designed for use in life sustaining or life saving applications unless otherwise expressly indicated. Resources Samples 2017 Littelfuse, Inc. Specifications are subject to change without notice. Revised: 05/12/17 TVS Diode Arrays (SPA Diodes) General Purpose ESD Protection - SP724 Series Absolute Maximum Ratings Thermal Information Parameter Rating Units Parameter Rating Units o Thermal Resistance (Typical, Note 3) C/W Continuous Supply Voltage, (V+) - (V-) +20 V JA o SOT Package 220 C/W Forward Peak Current, I to V , GND IN CC 2.2, 100s A (Refer to Figure 5) o Maximum Storage Temperature Range -65 to 150 C CAUTION: Stresses above those listed in Absolute Maximum Ratings may cause o Maximum Junction Temperature 150 C permanent damage to the device. This is a stress only rating and operation of the device Maximum Lead Temperature at these or any other conditions above those indicated in the operational sections of this o 260 C (Soldering 20-40s) (SOT - Lead Tips Only) specification is not implied. Note: Note: 3. is measured with the component mounted on an evaluation PC board in free air. JA ESD Ratings and Capability - See Figure 1, Table 1 o o Electrical Characteristics T = -40 C to 105 C, V = 0.5V , Unless Otherwise Specified A IN CC Parameter Symbol Test Conditions Min Typ Max Units Operating Voltage Range, V 1 - 20 V SUPPLY V = (V+) - (V-) (Notes 4, 5) SUPPLY Forward Voltage Drop Forward Voltage Drop IN to V- V I = 1A (Peak Pulse) - 2 - V FWDL IN IN to V+ V - 2 - V FWDH Input Leakage Current I -10 1 10 nA IN Quiescent Supply Current I V+ = 20V, V- = GND - - 100 nA QUIESCENT Equivalent SCR ON Threshold (Note 6) - 1.1 - V Equivalent SCR ON Resistance V /I (Note 6) - 1.0 - FWD FWD Input Capacitance C - 3 - pF IN Notes: 4. In automotive and other battery charging systems, the SP724 power supply lines should be externally protected for load dump and reverse battery. When the V+ and V- Pins are connected to the same supply voltage source as the device or control line under protection, a current limiting resistor should be connected in series between the external supply and the SP724 supply pins to limit reverse battery current to within the rated maximum limits. 5. Bypass capacitors of typically 0.01F or larger should be connected closely between the V+ and V- Pins for all applications. 6. Refer to the Figure 3 graph for definitions of equivalent SCR ON Threshold and SCR ON Resistance. These characteristics are given here for information to determine peak current and dissipation under EOS conditions. Typical Application of the SP724 Application as an Input Clamp for Over-voltage, Greater than 1V BE Above V+ or less than -1V below V-) BE 2017 Littelfuse, Inc. Specifications are subject to change without notice. Revised: 05/12/17