xr ST16C1550/51 2.97V TO 5.5V UART WITH 16-BYTE FIFO AUGUST 2005 REV. 4.2.1 FEATURES GENERAL DESCRIPTION Pin and functionally compatible to SSI 73M1550/ The ST16C1550 and ST16C1551 UARTs (here on 2550 denoted as the ST16C155X) are improved versions of the SSI 73M1550 and SSI 73M2550 UART with 16 byte Transmit FIFO higher operating speed and lower access time. The 16 byte Receive FIFO with error flags ST16C155X provides enhanced UART functions with 4 selectable Receive FIFO interrupt trigger levels 16 byte FIFOs, a modem control interface, independent programmable baud rate generators Modem Control Signals (CTS , RTS , DSR , with clock rates up to 1.5 Mbps. Onboard status DTR , RI , CD ) registers provide the user with error indications and Programmable character lengths (5, 6, 7, 8) with operational status. System interrupt and modem even, odd or no parity control features may be tailored by external software Crystal or external clock input (except 28 pin to meet specific user requirements. An internal ST16C1551, external clock only) loopback capability allows onboard diagnostics. The baud rate generator can be configured for either 1.5 Mbps Transmit/Receive operation (24 MHz) crystal or external clock input with the exception of with programmable clock control the 28 pin ST16C1551 package (where an external Power Down Mode (50 uA at 3.3 V, 200 uA at 5 V) clock must be provided). Each package type, with the Software controllable reset output exception of the 28 pin ST16C155X, provides a buffered reset output that can be controlled through 2.97 to 5.5 Volt operation user software. DMA monitor signals TXRDY/RXRDY APPLICATIONS are not available at the ST16C155X I/O pins but these signals are accessible through ISR register bits Battery Operated Electronics 4-5. Except as listed above, all package versions Internet Appliances have the same features. The ST16C155X is not compatible with the industry standard 16550 and will Handheld Terminal not work with the standard serial port driver in MS Personal Digital Assistants Windows (see pages 16-17 for details). For an MS Cellular Phones DataPort Windows compatible UART, see the ST16C550. FIGURE 1. BLOCK DIAGRAM 16 Byte TX FIFO A2:A0 Transmitter TX D7:D0 IOR DTR , RTS IOW UART Modem Control Signals Configuration DSR , CTS , Regs CD , RI Data Bus CS Interface RX Receiver INT 16 Byte RX FIFO Baud Rate Generator RESET RST XTAL1/CLK Crystal Osc/Buffer XTAL2 Exar Corporation 48720 Kato Road, Fremont CA, 94538 (510) 668-7000 FAX (510) 668-7017 www.exar.com ST16C1550/51 xr 2.97V TO 5.5V UART WITH 16-BYTE FIFO REV. 4.2.1 FIGURE 2. ST16C1550 PINOUTS 48-TQFP PACKAGE NOTE: PINOUTS NOT TO SCALE. ACTUAL SIZE OF TQFP PACKAGE IS SMALLER THAN PLCC PACKAGE. N.C. 1 36 N.C. N.C. 2 35 N.C. D4 3 34 CTS D5 4 33 RESET 5 32 D6 DTR D7 6 31 RTS ST16C1550CQ48 RX 7 30 A0 TX 8 29 N.C. CS 9 28 A1 N.C. 10 27 A2 N.C. 11 26 N.C. N.C. 12 25 N.C. 28-PLCC PACKAGES D4 5 25 CTS D5 RESET 6 24 D6 DTR 7 23 D7 RTS 8 ST16C1550CJ28 22 RX A0 9 21 TX 10 20 A1 CS A2 11 19 2 N.C. 13 48 N.C. N.C. 14 47 D3 XTAL1 12 4 D3 D2 XTAL1 15 46 XTAL2 13 3 D2 45 D1 XTAL2 16 IOW 17 44 N.C. 14 D1 IOW 2 N.C. 18 43 D0 15 D0 GND 1 GND 19 42 N.C. IOR 16 28 VCC VCC IOR 20 41 RI 17 27 CD 40 CD RI 21 RST 39 22 DSR INT 18 26 DSR INT 23 38 N.C. N.C. 24 37 N.C.