xr XR16C2850 2.97V TO 5.5V DUAL UART WITH 128-BYTE FIFOS NOVEMBER 2005 REV. 2.1.3 FEATURES GENERAL DESCRIPTION Added feature in devices with a top mark date code of 1 The XR16C2850 (2850) is an enhanced dual F2 YYW and newer: universal asynchronous receiver and transmitter 5V tolerant inputs (UART). Enhanced features include 128 bytes of TX 0 ns address hold time (T ) and RX FIFOs, programmable TX and RX FIFO AH trigger level, FIFO level counters, automatic (RTS/ Pin-to-pin compatible and functionally compatible to CTS) hardware and (Xon/Xoff) software flow control, Exars ST16C2550 and XR16L2750 and TIs automatic RS-485 half duplex direction control output TL16C752B in the 48-TQFP package and data rates up to 6.25 Mbps at 5V and 8X Pin-alike Exars XR16L2750 and ST16C2550 48- sampling clock. Onboard status registers provide the user TQFP package but with additional CLK8/16, with operational status and data error flags. An internal CLKSEL and HDCNTL inputs loopback capability allows system diagnostics. The 2850 has a full modem interface and can operate at 2.97V Two independent UART channels to 5.5V and is pin-to-pin compatible to Exars Register set compatible to 16C550 ST16C2550 and XR16C2750 except the 48-TQFP Up to 6.25 Mbps at 5V, and 4 Mbps at 3.3V package. The 2850 register set is compatible to the Transmit and Receive FIFOs of 128 bytes industry standard ST16C2550 and is available in 48- Programmable TX and RX FIFO Trigger Levels pin TQFP and 44-pin PLCC packages. Transmit and Receive FIFO Level Counters NOTE: 1 Covered by U.S. Patent 5,649,122 and 5,949,787 Automatic Hardware (RTS/CTS) Flow Control APPLICATIONS Selectable Auto RTS Flow Control Hysteresis Portable Appliances Automatic Software (Xon/Xoff) Flow Control Telecommunication Network Routers Auto RS-485 Half-duplex Direction Control Wireless Infrared (IrDA 1.0) Encoder/Decoder Ethernet Network Routers Full modem interface Cellular Data Devices Device Identification and Revision Factory Automation and Process Controls Crystal oscillator or external clock input Industrial and commercial temperature ranges 48-TQFP and 44-PLCC packages FIGURE 1. XR16C2850 BLOCK DIAGRAM A2:A0 2.97V to 5.5V VCC D7:D0 GND IOR IOW UART Channel A CSA TXA, RXA, DTRA , 128 Byte TX FIFO UART DSRA , RTSA , CSB Regs DTSA , CDA , RIA , IR INTA TX & RX ENDEC OP2A 8-bit Data INTB BRG Bus 128 Byte RX FIFO TXRDYA Interface TXRDYB TXB, RXB, DTRB , RXRDYA UART Channel B DSRB , RTSB , RXRDYB (same as Channel A) CTSB , CDB , RIB , HDCNTL OP2B CLKSEL XTAL1 Crystal Osc/Buffer CLK8/16 XTAL2 Reset Exar Corporation 48720 Kato Road, Fremont CA, 94538 (510) 668-7000 FAX (510) 668-7017 www.exar.com XR16C2850 xr 2.97V TO 5.5V DUAL UART WITH 128-BYTE FIFOS REV. 2.1.3 FIGURE 2. PIN OUT ASSIGNMENT D5 1 36 RESET D6 2 35 DTRB D7 3 34 DTRA RXB 4 33 RTSA 5 32 OP2A RXA XR16C2850 TXRDYB 6 31 RXRDYA 48-pin TQFP TXA 7 30 INTA TXB 8 29 INTB OP2B 9 28 A0 10 27 A1 CSA CSB 11 26 A2 NC 12 25 CLKSEL D5 7 39 RESET D6 8 38 DTRB D7 9 37 DTRA RXB 10 36 RTSA 11 35 OP2A RXA XR16C2850 TXRDYB 12 34 RXRDYA 44-pin PLCC TXA 13 33 INTA TXB 14 32 INTB OP2B 15 31 A0 CSA 16 30 A1 17 29 A2 CSB ORDERING INFORMATION OPERATING PART NUMBER PACKAGE TEMPERATURE DEVICE STATUS RANGE XR16C2850CJ 44-Lead PLCC 0C to +70C Active XR16C2850CM 48-Lead TQFP 0C to +70C Active XR16C2850IJ 44-Lead PLCC -40C to +85C Active XR16C2850IM 48-Lead TQFP -40C to +85C Active 2 XTAL1 13 48 D4 XTAL2 14 47 D3 IOW 15 46 D2 CDB 45 D1 16 GND 17 44 D0 RXRDYB 18 43 TXRDYA IOR 19 42 VCC DSRB 41 RIA 20 RIB 21 40 CDA RTSB 22 39 DSRA CTSB 23 38 CTSA CLK8/16 24 37 HDCNTL XTAL1 18 6 D4 19 XTAL2 5 D3 IOW 20 4 D2 CDB 21 3 D1 GND 22 2 D0 23 1 RXRDYB TXRDYA IOR 24 44 VCC DSRB 25 43 RIA RIB 26 42 CDA RTSB 27 41 DSRA CTSB 28 40 CTSA