XR16M580 1.62V TO 3.63V HIGH PERFORMANCE UART WITH 16-BYTE FIFO SEPTEMBER 2008 REV. 1.0.0 FEATURES GENERAL DESCRIPTION Pin-to-pin compatible with XR16L580 in 32-QFN 1 The XR16M580 (M580) is an enhanced Universal and 48-TQFP packages Asynchronous Receiver and Transmitter (UART) with 16 bytes of transmit and receive FIFOs, selectable Intel or Motorola Bus Interface select transmit and receive FIFO trigger levels, automatic 16Mbps maximum data rate hardware and software flow control, and data rates of up to 16 Mbps at 3.3V, 12.5 Mbps at 2.5V and 7.5 Selectable TX/RX trigger levels Mbps at 1.8V with 4X data sampling rate. TX/RX FIFO Level Counters The Auto RS-485 Half-Duplex Direction control Independent TX/RX Baud Rate Generator feature simplifies both the hardware and software for half-duplex RS-485 applications. In addition, the Fractional Baud Rate Generator Multidrop mode with Auto Address detection Auto RTS/CTS Hardware Flow Control increases the performance by simplifying the software routines. Auto XON/XOFF Software Flow Control The Independent TX/RX Baud Rate Generator Auto RS-485 Half-Duplex Direction Control feature allows the transmitter and receiver to operate Multidrop mode w/ Auto Address Detect at different baud rates. Power consumption of the M580 can be minimized by enabling the sleep mode Sleep Mode with Automatic Wake-up and PowerSave mode. PowerSave mode The M580 has a 16550 compatible register set that Infrared (IrDA 1.0 and 1.1) mode provide users with operating status and control, receiver error indications, and modem serial interface 1.62V to 3.63V supply operation controls. An internal loopback capability allows Crystal oscillator or external clock input onboard diagnostics. The M580 is available in 32-pin QFN, 48-pin TQFP and 25-pin BGA packages. All APPLICATIONS three packages offer both the 16 mode (Intel bus) Personal Digital Assistants (PDA) interface and the 68 mode (Motorola bus) interface which allows easy integration with Motorola Cellular Phones/Data Devices processors. Battery-Operated Devices NOTE: 1 Covered by U.S. Patent 5,649,122. Global Positioning System (GPS) Bluetooth FIGURE 1. XR16M580 BLOCK DIAGRAM VCC PwrSave (1.62 to 3.63 V) A2:A0 GND D7:D0 UART IOR TX, RX, IOW (R/W ) 16 Byte TX FIFO UART RTS , CTS , CS Regs DTR , DSR , TX & IR RI , CD ENDEC INT (IRQ ) RX Intel or Motorola RESET BRG 16 Byte RX FIFO Data Bus (RESET ) Interface 16/68 XTAL1 Crystal Osc/Buffer XTAL2 Exar Corporation 48720 Kato Road, Fremont CA, 94538 (510) 668-7000 FAX (510) 668-7017 www.exar.com XR16M580 1.62V TO 3.63V HIGH PERFORMANCE UART WITH 16-BYTE FIFO REV. 1.0.0 FIGURE 2. PIN OUT ASSIGNMENT FOR 32-PIN QFN AND 48-PIN TQFP PACKAGES IN 16 AND 68 MODE 24 23 22 21 20 19 18 17 24 23 22 21 20 19 18 17 NC DSR 25 16 DSR 25 16 NC CD 26 15 NC CD 26 15 NC RI 14 RI VCC 27 IOR 14 IOR 27 32-pin QFN in 32- pin QFN in VCC 13 VCC 28 GND 28 13 GND Motorola Bus Intel Bus Mode D0 29 29 12 IOW D0 12 R/W Mode 30 30 D1 XTAL 2 D1 XTAL 2 11 11 31 31 D2 10 XTAL 1 D2 XTAL 1 10 32 D3 9 PwrSave D3 32 9 PwrSave 23 4 5 6 78 1 2 3456 78 1 GND VCC 36 35 34 33 32 31 30 29 28 27 26 25 36 35 34 33 32 31 30 29 28 27 26 25 24 37 NC NC 37 NC NC 24 38 23 NC 38 23 NC CTS CTS 22 39 DSR 39 NC DSR 22 NC 40 21 NC 40 21 NC CD CD 20 41 RI 41 NC RI 20 NC 48-TQFP in 48-TQFP in 19 42 VCC 42 VCC 19 IOR IOR 43 18 43 18 D0 GND D0 GND Intel Bus Mode Motorola Bus Mode VCC 17 44 D1 44 D1 17 NC NC 45 16 45 16 D2 IOW D2 R/W 15 46 D3 46 XTAL2 D3 15 XTAL2 14 47 47 14 XTAL1 D4 XTAL1 D4 48 13 PwrSave 48 13 NC NC PwrSave 1 2 3 4 5 6 7 8 9 10 11 12 1 2 3 4 5 6 7 8 9 10 11 12 GND VCC 2 16/68 NC D5 RESET D6 NC D4 CTS D7 DTR RESET 16/68 NC RTS NC NC D5 DTR INT RX D6 RTS NC TX D7 INT A0 NC A1 RX A0 NC A2 CS TX A1 NC NC CS A2 D4 CTS NC 16/68 16/68 RESET D5 RESET D5 DTR D6 NC D6 RTS D7 DTR D7 NC RTS IRQ NC NC RX A0 IRQ RX TX A1 NC TX CS A2 A0 NC NC A1 A2 CS NC NC