XR16M770 1.62V TO 3.63V HIGH PERFORMANCE UART WITH 64-BYTE FIFO DECEMBER 2009 REV. 1.0.2 FEATURES GENERAL DESCRIPTION Pin-to-pin compatible with XR16L570 in 24-QFN 1 The XR16M770 (M770) is an enhanced Universal and 32-QFN packages Asynchronous Receiver and Transmitter (UART) with 64 bytes of transmit and receive FIFOs, Intel data bus Interface programmable transmit and receive FIFO trigger 16 Mbps maximum data rate levels, automatic hardware and software flow control, and data rates of up to 16 Mbps at 3.3V, 12.5 Mbps at Programmable TX/RX FIFO Trigger Levels 2.5V and 7.5 Mbps at 1.8V with 4X data sampling TX/RX FIFO Level Counters rate. Independent TX/RX Baud Rate Generator The Auto RS-485 Half-Duplex Direction control feature simplifies both the hardware and software for Fractional Baud Rate Generator half-duplex RS-485 applications. In addition, the Auto RTS/CTS Hardware Flow Control Multidrop mode with Auto Address detection increases the performance by simplifying the Auto XON/XOFF Software Flow Control software routines. Auto RS-485 Half-Duplex Direction Control The Independent TX/RX Baud Rate Generator Multidrop mode w/ Auto Address Detect feature allows the transmitter and receiver to operate at different baud rates. Power consumption of the Sleep Mode with Automatic Wake-up M770 can be minimized by enabling the sleep mode PowerSave mode in 24-pin QFN package and PowerSave mode. Infrared (IrDA 1.0 and 1.1) mode The M770 has a 16550 compatible register set that provide users with operating status and control, 1.62V to 3.63V supply operation receiver error indications, and modem serial interface Crystal oscillator or external clock input controls. An internal loopback capability allows onboard diagnostics. The M770 is available in 24-pin APPLICATIONS QFN, 32-pin QFN and 25-pin BGA packages. All Personal Digital Assistants (PDA) three packages offer the 16 mode (Intel bus) interface only. Cellular Phones/Data Devices NOTE: 1 Covered by U.S. Patent 5,649,122. Battery-Operated Devices Global Positioning System (GPS) Bluetooth FIGURE 1. XR16M770 BLOCK DIAGRAM VCC PwrSave (1.62 to 3.63 V ) A2:A0 GND D7:D0 UART IO R TX , R X , IO W 64 B yte TX FIFO UART RTS , CTS , CS Regs DTR , D S R , TX & IR RI , CD ENDEC RX IN T Intel BRG 64 B yte R X FIFO RESET D ata B us Interface XTAL1 C rystal O sc/B uffer XTAL2 Exar Corporation 48720 Kato Road, Fremont CA, 94538 (510) 668-7000 FAX (510) 668-7017 www.exar.com XR16M770 1.62V TO 3.63V HIGH PERFORMANCE UART WITH 64-BYTE FIFO REV. 1.0.2 FIGURE 2. PIN OUT ASSIGNMENT FOR 24-PIN QFN, 32-PIN QFN AND 25-BGA PACKAGES 24 23 22 21 20 19 18 17 18 17 16 15 14 13 VCC 19 12 A2 DSR 25 16 NC CD 26 15 NC D0 20 11 IOR RI 27 14 IOR D1 21 10 GND 24-pin QFN VCC 32-pin QFN 13 28 GND D2 22 9 IOW D0 29 12 IOW 23 8 D3 CLK 30 D1 11 XTAL 2 24 7 31 D4 PwrSave D2 10 XTAL 1 D3 32 1 234 56 9 NC 78 1 234 5 6 A1 Corner 1 2 3 4 5 A B C D E Transparent Top View CTS RESET INT A1 A2 VCC DTR RTS A0 IOR D0 D6 D7 DSR IOW D3 D1 TX CS XTAL1 D4 D2 D5 RX GND ORDERING INFORMATION OPERATING TEMPERATURE PART NUMBER PACKAGE DEVICE STATUS RANGE XR16M770IL24 24-Pin QFN -40C to +85C Active XR16M770IL32 32-Pin QFN -40C to +85C Active XR16M770IB25 25-Pin BGA -40C to +85C Active 2 CTS D5 Reset D6 RTS D7 INT RX A0 TX A1 CS D4 CTS NC RESET D5 DTR D6 RTS D7 INT RX A0 TX A1 CS A2