XR16V2752 HIGH PERFORMANCE DUART WITH 64-BYTE FIFO JULY 2007 REV. 1.0.2 FEATURES GENERAL DESCRIPTION 2.25 to 3.6 Volt Operation 1 The XR16V2752 (V2752) is a high performance dual universal asynchronous receiver and transmitter 5 Volt Tolerant Inputs (UART) with 64 byte TX and RX FIFOs. The device Pin-to-pin compatible to Exars XR16L2752 operates from 2.25 to 3.6 volts with 5 Volt tolerant inputs and is pin-to-pin compatible to Exars Two independent UART channels ST16C2552, XR16L2552 and XR16L2752. The Register set compatible to XR16L2752 V2752 register set is identical to the XR16L2752 and Data rate of up to 8 Mbps at at 3.3 V, and is compatible to the ST16C2552 and the XR16C2852 6.25 Mbps at 2.5 V with 8X sampling rate enhanced features. It supports the Exars enhanced Fractional Baud Rate Generator features of programmable FIFO trigger level and FIFO level counters, automatic hardware (RTS/CTS) Transmit and Receive FIFOs of 64 bytes and software flow control, automatic RS-485 half Programmable TX and RX FIFO Trigger Levels duplex direction control output and a complete Transmit and Receive FIFO Level Counters modem interface. Onboard registers provide the user Automatic Hardware (RTS/CTS) Flow Control with operational status and data error flags. An internal loopback capability allows system Selectable Auto RTS Flow Control Hysteresis diagnostics. Independent programmable baud rate Automatic Software (Xon/Xoff) Flow Control generators are provided in each channel to select Automatic RS-485 Half-duplex Direction data rates up to 8 Mbps at 3.3 Volt and 8X sampling Control Output via RTS clock. The V2752 is available in 44-pin PLCC and 32- Wireless Infrared (IrDA 1.0) Encoder/Decoder pin QFN packages. Automatic sleep mode NOTE: 1 Covered by U.S. Patent 5,649,122 Full modem interface APPLICATIONS Alternate Function Register Portable Appliances Device Identification and Revision Telecommunication Network Routers Crystal oscillator or external clock input Ethernet Network Routers Crystal oscillator (up to 24MHz) or external clock Cellular Data Devices (up to 64MHz) input Factory Automation and Process Controls 44-PLCC and 32-QFN packages FIGURE 1. XR16V2752 BLOCK DIAGRAM 2.25 V to 3.6 V VCC *5 Volt Tolerant Inputs A2:A0 GND (Except External Clock Input) D7:D0 IOR UART Channel A IOW TXA (or TXIRA) 64 Byte TX FIFO CS UART CHSEL Regs IR TX & RX ENDEC INTA BRG 64 Byte RX FIFO INTB RXA (or RXIRA) 8-bit Data TXRDYA Bus TXRDYB TXB (or TXIRB) UART Channel B Interface (same as Channel A) MFA RXB (or RXIRB) (OP2A , BAUDOUTA , or RXRDYA ) XTAL1 Crystal Osc/Buffer MFB XTAL2 (OP2B , CTS A/B, RI A/B, BAUDOUTB , or Modem Control Logic CD A/B, DSR A/B RXRDYB ) Reset DTR A/B, RTS A/B Exar Corporation 48720 Kato Road, Fremont CA, 94538 (510) 668-7000 FAX (510) 668-7017 www.exar.com XR16V2752 HIGH PERFORMANCE DUART WITH 64-BYTE FIFO REV. 1.0.2 FIGURE 2. PIN OUT ASSIGNMENT 7 39 RXA D5 D6 8 38 TXA D7 9 37 DTRA A0 10 36 RTSA XTAL1 11 35 MFA XR16V2752 GND 12 34 INTA 44-pin PLCC XTAL2 13 33 VCC A1 14 32 TXRDYB A2 15 31 RIB CHSEL 16 30 CDB INTB 17 29 DSRB 1 24 RXA D6 2 23 TXA D7 3 22 RTSA A0 XR16V2752 4 21 INTA XTAL1 32-pin QFN 5 20 GND XTAL2 A1 6 19 NC NC 7 18 A2 8 CHSEL 17 CTSB ORDERING INFORMATION PART NUMBER PACKAGE OPERATING TEMPERATURE RANGE DEVICE STATUS XR16V2752IL 32-QFN -40C to +85C Active XR16V2752IJ 44-Lead PLCC -40C to +85C Active 2 CS 18 6 D4 MFB 19 5 D3 32 20 INTB 9 D5 IOW 4 D2 CS 31 D4 10 RESET 21 3 D1 IOW 11 30 D3 GND 22 2 D0 RESET 12 29 D2 RTSB 23 1 TXRDYA RTSB 13 28 D1 24 IOR 44 VCC IOR 14 27 D0 RXB 25 43 RIA RXB 15 26 VCC TXB 26 42 CDA TXB 16 25 CTSA DTRB 27 41 DSRA CTSB 28 40 CTSA