XR20V2172IL64-F MaxLinear

XR20V2172 TWO CHANNEL I2C/SPI UART WITH 64-BYTE FIFO AND RS232 TRANSCEIVER JUNE 2011 REV. 1.0.2 FEATURES GENERAL DESCRIPTION 2 Selectable I C/SPI Interface 1 The XR20V2172 (V2172) is a high performance two channel universal asynchronous receiver and SPI clock frequency up to 18 MHz transmitter (UART) with 64 byte TX and RX FIFOs, a Meets true EIA/TIA-232-F Standards from +3.3V to 2 selectable IC/SPI slave interface and RS232 +5.5V operation transceiver. The V2172 operates from 3.3 to 5.5 volts. Data rate up to 1 Mbps The enhanced features in the V2172 include a programmable fractional baud rate generator, an 8X 45us sleep mode exit (charge pump to full power) and 4X sampling rate that allows for a maximum baud ESD protection for RS-232 I/O pins at rate of 1 Mbps at 3.3V. The standard features include 16 selectable TX and RX FIFO trigger levels, +/-15kV - Human Body Model automatic hardware (RTS/CTS) and software (Xon/ +/-15kV - IEC 61000-4-2, Air-Gap Discharge Xoff) flow control, and a complete modem interface. +/- 8kV - IEC 61000-4-2, Contact Discharge Onboard registers provide the user with operational status and data error flags. An internal loopback Full-featured UART capability allows system diagnostics. The V2172 is Fractional Baud Rate Generator available in the 64-pin QFN. Transmit and Receive FIFOs of 64 bytes NOTE: 1 Covered by U.S. Patent 5,649,122 16 Selectable TX and RX FIFO Trigger Levels APPLICATIONS Automatic Hardware (RTS/CTS) Flow Control Portable Appliances Automatic Software (Xon/Xoff) Flow Control Halt and Resume Transmission Control Battery-Operated Devices Automatic sleep mode Cellular Data Devices General Purpose I/Os Factory Automation and Process Controls Full modem interface 64-QFN packages FIGURE 1. XR20V2172 BLOCK DIAGRAM VREF+ Crystal BRG C harge P um p IR Q O sc/Buffer VREF- RESET 64 B yte TXA TXDA TX & R X RXA RXDA FIFO 5K RTSA RTSA DTRA DTRA CTSA CTSA I2C /SP I 5K M odem DSRA DSRA I/O s 5K SDA RIA RIA 5K SCK CDA CDA 5K C hannel A C h A Transceiver A0/CSA CDB CDB RIB RIB A1/SI DSRB DSRB CTSB CTSB C hannel B C hannel B SO DTRB DTRB RTSB Transceiver RTSB TXB TXDB RXB RXDB TXB RXB SEL RXB U A R T R S -232 Transceiver Exar Corporation 48720 Kato Road, Fremont CA, 94538 (510) 668-7000 FAX (510) 668-7017 www.exar.com I2C/SPI Interface UART Registers XTAL1 XTAL2 GND VCC R EN FAST ACP C2+ C2- C1+ C1-XR20V2172 TWO CHANNEL I2C/SPI UART WITH 64-BYTE FIFO AND RS232 TRANSCEIVER REV. 1.0.2 FIGURE 2. PIN OUT ASSIGNMENT GND 1 48 N.C. SDA 2 47 N.C. N.C. 3 46 N.C. CTSB 4 45 VCC RTSB 5 44 C2+ RXB SEL 6 43 C2- RXB 7 42 TXDA XR20V2172 TXB 8 41 DTRA 64-pin QFN N.C. 9 40 DSRA N.C. 10 39 RXDA 11 38 IRQ N.C. DTRB 12 37 N.C. RIB 13 36 N.C. DSRB 14 35 GND XTAL1 15 34 N.C. GND 16 33 SCK ORDERING INFORMATION PART NUMBER PACKAGE OPERATING TEMPERATURE RANGE DEVICE STATUS XR20V2172IL64-F 64-pin QFN -40C to +85C Active XR20V2172IL64TR-F 64-pin QFN -40C to +85C Active NOTE: TR = Tape and Reel, F = Green / RoHS 2 SO XTAL2 17 64 N.C. 18 63 CTSA FAST 19 62 CDB R EN 20 61 I2C/SPI GND 60 CDA 21 N.C. 22 59 A1/SI N.C. 23 58 RIA ACP 24 57 A0/CS VREF- 56 C3 25 N.C. 26 55 N.C. TXDB 27 54 VCC RTSA 28 53 VREF+ RXDB 29 52 RESET N.C. 30 51 C1+ N.C. 31 50 C1- N.C. 32 49 N.C.