XRD98L59 CCD Image Digitizers with CDS, PGA and 10-Bit A/D January 2001-2 FEATURES 10-bit Resolution ADC 5 A Typical Stand By Mode Current Three-State Digital Outputs 20MHz Sampling Rate 2,000V ESD Protection Programmable Gain: 6dB to 38dB PGA (2x to 80x) 28-pin TSSOP Package Improved Digitally Controlled Offset-Calibration with Pixel Averager and Hot Pixel Clipper APPLICATIONS DNS Filter Removes Black Level Digital Noise Digital Still Cameras Widest Black Level Calibration Range at Digital Camcorders Maximum Gain PC Video Cameras Manual Control of Offset DAC via Serial Port for Use with High Speed Scanners CCTV/Security Cameras 2ns/step Programmable Aperture Delay on SPIX Industrial/Medical Cameras and SBLK 2D Bar Code Readers Single 2.7V to 3.6V Power Supply High Speed Scanners Low Power for Battery Operation:120mW V =3V DD Digital Copiers GENERAL DESCRIPTION The XRD98L59 is a complete low power CCD Image The auto calibration circuit compensates for any inter- Digitizer for digital, motion and still cameras. The nal offset of the XRD98L59 as well as black level offset product includes a high bandwidth differential Corre- from the CCD. lated Double Sampler (CDS), 8-bit digitally Program- mable Gain Amplifier (PGA), 10-bit Analog-to-Digital The PGA and black level auto-calibration are con- Converter (ADC) and improved digitally controlled trolled through a simple 3-wire serial interface. The black level auto-calibration circuitry with pixel averager timing circuitry is designed to enable users to select a hot pixel clipper, and a DNS filter. wide variety of available CCD and image sensors for their applications. The Correlated Double Sampler (CDS) subtracts the CCD output signal black level from the video level. The XRD98L59 has direct access to the ADC input for Common mode signal and power supply noise are digitizing other analog signals. The XRD98L59 is rejected by the differential CDS input stage. packaged in 28-lead surface mount TSSOP to reduce space and weight, and is suitable for hand-held and portable applications. The PGA is digitally controlled with 8-bit resolution on a linear dB scale, resulting in a gain range of 6dB to 38dB with 0.125dB per LSB of the gain code. ORDERING INFORMATION Operating Maximum Part No. Package Temperature Range Power Supply Sampling Rate XRD98L59AIG 28-Lead TSSOP -40C to 85C 3.0V 20 MSPS Rev. 2.00 EXAR Corporation, 48720 Kato Road, Fremont, CA 94538 (510) 668-7000 FAX (510) 668-7017 www.exar.comXRD98L59 AVDD DVDD VRT VRB 140 400 60 AVDD AGND OVDD CCDin 10 CDS + PGA1 + PGA2 10-bit ADC Reg DB 9:0 REFin ADCIN OGND SPIX SBLK Internal Clock 10 Generator CLAMP 4-bit CDAC 10-bit FDAC Black Level CAL Offset Calibration Loop Hot Pixel Clipper Coarse Fine Manual DAC Accumulator Accumulator Control Power Down PD + DNS Pixel Offset Calibration Logic + Filter Averager Clock - Control Calibration Mode SCLK Gain Code Serial Interface SDI Target Offset Code and Registers LOAD Power Down AGND DGND Figure 1. XRD98L59 Block Diagram Rev. 2.00 2