XRT83L38 OCTAL T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR JUNE 2007 REV. 1.0.2 crystal-less jitter attenuator with a 32 or 64 bit FIFO GENERAL DESCRIPTION can be placed either in the receive or the transmit The XRT83L38 is a fully integrated Octal (eight path with loop bandwidths of less than 3Hz. The channel) long-haul and short-haul line interface unit XRT83L38 provides a variety of loop-back and for T1 (1.544Mbps) 100, E1 (2.048Mbps) 75 or diagnostic features as well as transmit driver short 120, or J1 110 applications. circuit detection and receive loss of signal monitoring. It supports internal impedance matching for 75, In long-haul applications the XRT83L38 accepts 100, 110 and 120 for both transmitter and signals that have been attenuated from 0 to 36dB at receiver. In the absence of the power supply, the 772kHz in T1 mode (equivalent of 0 to 6000 feet of transmit outputs and receive inputs are tri-stated cable loss) or 0 to 43dB at 1024kHz in E1 mode. allowing for redundancy applications The chip In T1 applications, the XRT83L38 can generate five includes an integrated programmable clock multiplier transmit pulse shapes to meet the short-haul Digital that can synthesize T1 or E1 master clocks from a Cross-Connect (DSX-1) template requirements as variety of external clock sources. well as for Channel Service Units (CSU) Line Build APPLICATIONS Out (LBO) filters of 0dB, -7.5dB -15dB and -22.5dB as required by FCC rules. It also provides T1 Digital Cross-Connects (DSX-1) programmable transmit pulse generators for each ISDN Primary Rate Interface channel that can be used for output pulse shaping allowing performance improvement over a wide CSU/DSU E1/T1/J1 Interface variety of conditions (The arbitrary pulse generators T1/E1/J1 LAN/WAN Routers are available in both T1 and E1 modes). Public switching Systems and PBX Interfaces The XRT83L38 provides both a parallel Host microprocessor interface as well as a Hardware T1/E1/J1 Multiplexer and Channel Banks mode for programming and control. Features (See Page 2) Both the B8ZS and HDB3 encoding and decoding functions are selectable as well as AMI. An on-chip FIGURE 1. BLOCK DIAGRAM OF THE XRT83L38 T1/E1/J1 LIU (HOST MODE) MCLKE1 MCLKOUT MASTER CLOCK SYNTHESIZER MCLKT1 TAOS One of Eight channels, CHANNEL n - (n= 0:7) DRIVE DMO n DFM ENABLE MONITOR TPOS n/TDATA n TTIP n QRSS HDB3/ TX FILTER TX/RX JITTER TIMING LINE TNEG n/CODES n PATTERN B8ZS & PULSE ATTENUATOR CONTROL DRIVER GENERATOR ENCODER SHAPER TCLK n TRING n LBO 3:0 TXON n LOCAL QRSS ENABLE ANALOG REMOTE DIGITAL LOOPBACK LOOPBACK LOOPBACK LOOPBACK QRSS ENABLE DETECTOR RCLK n HDB3/ TIMING & PEAK TX/RX JITTER RX RTIP n RNEG n/LCV n B8ZS DATA DETECTOR ATTENUATOR EQUALIZER RRING n DECODER RECOVERY & SLICER RPOS n/RDATA n NETWORK LOS AIS LOOP NLCD ENABLE EQUALIZER DETECTOR DETECTOR DETECTOR CONTROL RLOS n TEST ICT HW/HOST PTS1 WR R/W PTS2 RD DS MICROPROCESSOR CONTROLLER D 7:0 ALE AS CS PCLK RDY DTACK A 7:0 INT RESET Exar Corporation 48720 Kato Road, Fremont CA, 94538 (510) 668-7000 FAX (510) 668-7017 www.exar.com JA SELECTXRT83L38 OCTAL T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR REV. 1.0.2 FIGURE 2. BLOCK DIAGRAM OF THE XRT83L38 T1/E1/J1 LIU (HARDWARE MODE) MCLKE1 MCLKOUT MASTER CLOCK SYNTHESIZER MCLKT1 CLKSEL 2:0 TAOS n One of Eight Channels, CHANNEL n - (n=0 : 7) DRIVE DFM DMO n MONITOR TPOS n/TDATA n TTIP n QRSS HDB3/ TX FILTER TX/RX JITTER TIMING LINE TNEG n/CODES n PATTERN B8ZS & PULSE ATTENUATOR CONTROL DRIVER GENERATOR ENCODER SHAPER TCLK n TRING n LBO 3:0 LOCAL TXON n QRSS ENABLE ANALOG REMOTE DIGITAL LOOPBACK LOOPBACK LOOPBACK LOOPBACK QRSS ENABLE DETECTOR RCLK n HDB3/ TIMING & PEAK RTIP n TX/RX JITTER RX B8ZS DATA DETECTOR RNEG n/LCV n ATTENUATOR EQUALIZER RRING n DECODER RECOVERY & SLICER RPOS n/RDATA n NETWORK LOOP1 n LOS AIS LOOP NLCD ENABLE LOOP0 n EQUALIZER DETECTOR DETECTOR DETECTOR CONTROL RLOS n TEST ICT HW/HOST RESET GAUGE TRATIO JASEL1 SR/DR JASEL0 EQC 4:0 RXTSEL HARWARE CONTROL TCLKE TXTSEL RCLKE TERSEL1 RXMUTE TERSEL0 ATAOS RXRES1 RXRES0 FEATURES Fully integrated eight channel long-haul or short-haul transceivers for E1,T1 or J1 applications Adaptive Receive Equalizer for up to 36dB cable attenuation Programable Transmit Pulse Shaper for E1,T1 or J1 short-haul interfaces Five fixed transmit pulse settings for T1 short-haul applications plus a fully programmable waveform generator for transmit output pulse shaping available for both T1 and E1 modes Transmit Line Build-Outs (LBO) for T1 long-haul application from 0dB to -22.5dB in three 7.5dB steps Selectable receiver sensitivity from 0 to 36dB cable loss for T1 772kHz and 0 to 43dB for E1 1024kHz Receive monitor mode handles 0 to 29dB resistive attenuation along with 0 to 6dB of cable attenuation for E1 and 0 to 3dB of cable attenuation for T1 modes Supports 75 and 120 (E1), 100 (T1) and 110 (J1) applications Internal and/or external impedance matching for 75, 100, 110 and 120 Tri-State transmit output and receive input capability for redundancy applications Provides High Impedance for Tx and Rx during power off Transmit return loss meets or exceeds ETSI 300-166 standard On-chip digital clock recovery circuit for high input jitter tolerance Crystal-less digital jitter attenuator with 32-bit or 64-bit FIFO selectable either in transmit or receive path On-chip frequency multiplier generates T1 or E1 Master clocks from variety of external clock sources High receiver interference immunity On-chip transmit short-circuit protection and limiting, and driver fail monitor output (DMO) Receive loss of signal (RLOS) output 2 JA SELECT