24LC1025T-ISN Microchip

24AA1025/24LC1025/24FC1025 2 1024-Kbit I C Serial EEPROM Device Selection Table Part Number VCC Range Maximum Clock Frequency Temperature Ranges Packages (1) IP, SN, SM 24AA1025 1.7V-5.5V 400 kHz (2) 24LC1025 2.5V-5.5V 400 kHz I, E P, SN, SM (3) 24FC1025 1.8V-5.5V 1 MHz IP, SN, SM Note 1: 100 kHz for VCC < 2.5V 2: 100 kHz for VCC < 4.5V, E-temp 3: 400 kHz for VCC < 2.5V Features Description (1) Low-Power CMOS Technology: The Microchip Technology Inc. 24XX1025 is a 1024-Kbit Electrically Erasable PROM (EEPROM). - Read current 450 A, maximum The device is organized as two block of 64K x 8 bit - Standby current 5 A, maximum memory with a two-wire serial interface. Its low-voltage 2 C Compatible Two-Wire Serial Interface, I design permits operation down to 1.7V, with standby Cascadable up to Four Devices and active currents of 5 A and 5 mA, respectively. The Schmitt Trigger Inputs for Noise Suppression 24XX1025 also has a page write capability for up to 128 bytes of data. Output Slope Control to Eliminate Ground Bounce 100 KHz and 400 KHz Clock Compatibility This device is capable of both random and sequential 1 MHz Clock for FC Versions reads. Reads may be sequential within address boundaries 0000h to FFFFh and 10000h to 1FFFFh. Page Write Time: 5 ms, Maximum Functional address lines allow up to four devices on the Self-Timed Erase/Write Cycle same data bus. This allows for up to 4 Mbits total 128-Byte Page Write Buffer system EEPROM memory. Hardware Write-Protect ESD Protection >4000V Note 1: 24XX1025 is used in this document as a More than 1 Million Erase/Write Cycles generic part number for the Data Retention >200 Years 24AA1025/24LC1025/24FC1025 devices. Factory Programming Available RoHS Compliant Package Type Temperature Ranges: PDIP SOIC/SOIJ - Industrial (I): -40C to +85 C - Extended (E): -40 C to +125C A0 1 8 VCC 1 8 A0 VCC Automotive AEC-Q100 Qualified A1 2 7 WP 2 7 WP A1 (1) A2 3 6 SCL (1) 3 6 A2 SCL Packages VSS 4 5 SDA 4 5 VSS SDA 8-Lead PDIP, 8-Lead SOIC and 8-Lead SOIJ Note 1: A2 must be tied to VCC. 2005-2021 Microchip Technology Inc. and its subsidiaries DS20001941M-page 124AA1025/24LC1025/24FC1025 Block Diagram A0 A1 WP HV Generator I/O Memory EEPROM Control Control XDEC Array Logic Logic Page Latches I/O SCL YDEC SDA VCC Sense AMP VSS R/W Control DS20001941M-page 2 2005-2021 Microchip Technology Inc. and its subsidiaries