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25LC160DT-H/SN

25LC160DT-H/SN electronic component of Microchip

Datasheet
EEPROM 16K 2K X 8 32B PAGE 2.5V

Manufacturer: Microchip
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Price (USD)

3300: USD 0.9015 ea
Line Total: USD 2974.95

0 - Global Stock
MOQ: 3300  Multiples: 3300
Pack Size: 3300
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0 - WHS 1


Ships to you between Wed. 22 May to Fri. 24 May

MOQ : 3300
Multiples : 3300

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25LC160DT-H/SN
Microchip

3300 : USD 0.877

     
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25LC080C/25LC080D/25LC160C/ 25LC160D/25LC320A/25LC640A/ 25LC128/25LC256 8K-256K SPI Serial EEPROM High-Temp Family Data Sheet Communication to the device can be paused via the Features hold pin (HOLD). While the device is paused, Maximum Clock: 5 MHz transitions on its inputs will be ignored, with the Low-Power CMOS Technology: exception of Chip Select, allowing the host to service higher priority interrupts. - Write current: 5 mA at 5.5V (maximum) - Read current: 5 mA at 5.5V, 5 MHz Note 1: 25LCXXX is used in this document as a - Standby current: 10 A at 5.5V generic part number for the 25LC080C/25LC080D/25LC160C/25LC 1,024 x 8 through 32,768 x 8-bit Organization 160D/25LC320A/25LC640A/25LC128/2 Byte and Page-Level Write Operations 5LC256 devices. Self-Timed Erase and Write Cycles (6 ms maximum) Packages Block Write Protection: - Protect none, 1/4, 1/2 or all of array 8-Lead SOIC Built-in Write Protection: - Power-on/off data protection circuitry Package Types (not to scale) - Write enable latch - Write-protect pin 8-Lead SOIC Sequential Read (Top View) High Reliability: CS 1 8 VCC - Endurance: >1,000,000 erase/write cycles - Data retention: >200 years SO 2 7 HOLD - ESD protection: >4000V WP 3 6 SCK Temperature Range Supported: VSS 4 5 SI - Extended (H): -40C to +150C RoHS Compliant Automotive AEC-Q100 Qualified Pin Function Table Description (1) Name Function Microchip Technology Inc. 25LCXXX devices are Mid-density 8- through 256-Kbit Serial Electrically CS Chip Select Input Erasable PROMs (EEPROM). The devices are SO Serial Data Output organized in blocks of x8-bit memory and support the WP Write-Protect Serial Peripheral Interface (SPI) compatible serial bus VSS Ground architecture. Byte-level and page-level functions are supported. The bus signals required are a clock input SI Serial Data Input (SCK) plus separate data in (SI) and data out (SO) SCK Serial Clock Input lines. Access to the device is controlled through a Chip HOLD Hold Input Select (CS) input. VCC Supply Voltage 2009-2021 Microchip Technology Inc. DS20002131E-page 125LC080C/25LC080D/25LC160C/25LC160D/25LC320A/25LC640A/ 25LC128/25LC256 DEVICE SELECTION TABLE Density Max. Speed Page Size Temp. Part Number Organization VCC Range Package (bits) (MHz) (Bytes) Range 25LC080C 8K 1,024 x 8 2.5V-5.5V 5 16 H SN 25LC080D 8K 1,024 x 8 2.5V-5.5V 5 32 H SN 25LC160C 16K 2,048 x 8 2.5V-5.5V 5 16 H SN 25LC160D 16K 2,048 x 8 2.5V-5.5V 5 32 H SN 25LC320A 32K 4,096 x 8 2.5V-5.5V 5 32 H SN 25LC640A 64K 8,192 x 8 2.5V-5.5V 5 32 H SN 25LC128 128K 16,384 x 8 2.5V-5.5V 5 64 H SN 25LC256 256K 32,768 x 8 2.5V-5.5V 5 64 H SN DS20002131E-page 2 2009-2021 Microchip Technology Inc.

Tariff Desc

8542.32.00 32 No ..CMOS and MOS Read Only Memory and Programmable Read Only Memory whether erasable or non-erasable (for example, flash memory, EPROM, E2PROM, EAPROM, NOVRAM, ROM and PROM)
AT9
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Microsemi Analog Mixed Signal Group
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