TO-247 APT17F80B APT17F80S 800V, 18A, 0.58 Max, t 250ns rr N-Channel FREDFET POWER MOS 8 is a high speed, high voltage N-channel switch-mode power 3 D PAK MOSFET. This FREDFET version has a drain-source (body) diode that has been opti- mized for high reliability in ZVS phase shifted bridge and other circuits through reduced t , soft recovery, and high recovery dv/dt capability. Low gate charge, high gain, and a rr greatly reduced ratio of C /C result in excellent noise immunity and low switching rss iss APT17F80B APT17F80S loss. The intrinsic gate resistance and capacitance of the poly-silicon gate structure help control di/dt during switching, resulting in low EMI and reliable paralleling, even Single die FREDFET when switching at very high frequency. FEATURES TYPICAL APPLICATIONS Fast switching with low EMI ZVS phase shifted and other full bridge Low t for high reliability Half bridge rr Ultra low C for improved noise immunity PFC and other boost converter rss Low gate charge Buck converter Avalanche energy rated Single and two switch forward RoHS compliant Flyback Absolute Maximum Ratings Symbol Parameter Ratings Unit Continuous Drain Current T = 25C 18 C I D Continuous Drain Current T = 100C 11 A C 1 I Pulsed Drain Current 70 DM V Gate-Source Voltage 30 V GS E 2 797 Single Pulse Avalanche Energy mJ AS I 9 AR Avalanche Current, Repetitive or Non-Repetitive A Thermal and Mechanical Characteristics Min Typ Max Unit Symbol Characteristic P Total Power Dissipation T = 25C 500 W D C R 0.25 Junction to Case Thermal Resistance JC C/W R 0.11 Case to Sink Thermal Resistance, Flat, Greased Surface CS T ,T Operating and Storage Junction Temperature Range -55 150 J STG C T Soldering Temperature for 10 Seconds (1.6mm from case) 300 L oz 0.22 W Package Weight T g 6.2 inlbf 10 Torque Mounting Torque ( TO-247 Package), 6-32 or M3 screw 1.1 Nm Microsemi Website - Static Characteristics T = 25C unless otherwise speci ed APT17F80B S J Symbol Parameter Test Conditions Min Typ Max Unit V V = 0V, I = 250A Drain-Source Breakdown Voltage 800 V BR(DSS) GS D V /T Reference to 25C, I = 250A Breakdown Voltage Temperature Coef cient 0.87 V/C BR(DSS) J D V = 10V, I = 9A R 3 Drain-Source On Resistance 0.42 0.58 DS(on) GS D V Gate-Source Threshold Voltage 2.5 4 5 V GS(th) V = V , I = 1mA GS DS D V /T Threshold Voltage Temperature Coef cient -10 mV/C GS(th) J V = 800V T = 25C 250 DS J I Zero Gate Voltage Drain Current A DSS V = 0V T = 125C 1000 GS J V = 30V I Gate-Source Leakage Current 100 nA GSS GS Dynamic Characteristics T = 25C unless otherwise speci ed J Symbol Parameter Test Conditions Min Typ Max Unit g V = 50V, I = 9A fs Forward Transconductance 17 S DS D C Input Capacitance 3757 iss V = 0V, V = 25V GS DS C Reverse Transfer Capacitance 64 rss f = 1MHz C Output Capacitance 374 oss pF 4 C Effective Output Capacitance, Charge Related 177 o(cr) V = 0V, V = 0V to 400V GS DS 5 C Effective Output Capacitance, Energy Related 88 o(er) Q Total Gate Charge 122 g V = 0 to 10V, I = 9A, GS D Q Gate-Source Charge 20 nC gs V = 400V DS Q Gate-Drain Charge gd 62 t Resistive Switching Turn-On Delay Time 21 d(on) t V = 533V, I = 9A Current Rise Time Preliminary 05-2008 31 r DD D ns 6 t R = 2.2 , V = 15V Turn-Off Delay Time 93 d(off) G GG t Current Fall Time 27 f Source-Drain Diode Characteristics Symbol Parameter Test Conditions Min Typ Max Unit Continuous Source Current MOSFET symbol I S 18 showing the (Body Diode) integral reverse p-n A Pulsed Source Current junction diode I 70 SM (body diode) 1 (Body Diode) V I = 9A, T = 25C, V = 0V Diode Forward Voltage 1.2 V SD SD J GS T = 25C 216 250 J t Reverse Recovery Time ns rr T = 125C 371 450 J 3 I = 9A T = 25C 0.97 SD J Q Reverse Recovery Charge C rr di /dt = 100A/s T = 125C 2.33 SD J V = 100V T = 25C 9 DD J I Reverse Recovery Current A rrm T = 125C 14 J I 9A, di/dt 1000A/s, V = 400V, SD DD dv/dt Peak Recovery dv/dt V/ns 25 T = 125C J 1 Repetitive Rating: Pulse width and case temperature limited by maximum junction temperature. 2 Starting at T = 25C, L = 19.7mH, R = 25, I = 9A. J G AS 3 Pulse test: Pulse Width < 380s, duty cycle < 2%. 4 C is de ned as a xed capacitance with the same stored charge as C with V = 67% of V . o(cr) OSS DS (BR)DSS 5 C is de ned as a xed capacitance with the same stored energy as C with V = 67% of V . To calculate C for any value of o(er) OSS DS (BR)DSS o(er) V less than V use this equation: C = -3.43E-8/V 2 + 1.44E-8/V + 5.38E-11. DS (BR)DSS, o(er) DS DS 6 R is external gate resistance, not including internal gate resistance or gate driver impedance. (MIC4452) G Microsemi reserves the right to change, without notice, the speci cations and information contained herein. 050-8165 Rev C 8-2011