APT75M50B2 APT75M50L 500V, 75A, 0.075 Max N-Channel MOSFET TM T-Ma x TO-264 Power MOS 8 is a high speed, high voltage N-channel switch-mode power MOSFET. A proprietary planar stripe design yields excellent reliability and manufacturability. Low switching loss is achieved with low input capacitance and ultra low CMille capaci- rss tance. The intrinsic gate resistance and capacitance of the poly-silicon gate structure help control slew rates during switching, resulting in low EMI and reliable paralleling, APT75M50B2 APT75M50L even when switching at very high frequency. Reliability in yback, boost, forward, and D other circuits is enhanced by the high avalanche energy capability. Single die MOSFET G S FEATURES TYPICAL APPLICATIONS Fast switching with low EMI/RFI PFC and other boost converter Low R Buck converter DS(on) Ultra low C for improved noise immunity Two switch forward (asymmetrical bridge) rss Low gate charge Single switch forward Avalanche energy rated Flyback RoHS compliant Inverters Absolute Maximum Ratings Symbol Parameter Ratings Unit Continuous Drain Current T = 25C 75 C I D Continuous Drain Current T = 100C 47 A C 1 I Pulsed Drain Current 230 DM V Gate-Source Voltage 30 V GS E 2 1580 Single Pulse Avalanche Energy mJ AS I 37 AR Avalanche Current, Repetitive or Non-Repetitive A Thermal and Mechanical Characteristics Min Typ Max Unit Symbol Characteristic P Total Power Dissipation T = 25C 1040 W D C R 0.12 Junction to Case Thermal Resistance JC C/W R 0.11 Case to Sink Thermal Resistance, Flat, Greased Surface CS T ,T Operating and Storage Junction Temperature Range -55 150 J STG C T Soldering Temperature for 10 Seconds (1.6mm from case) 300 L oz 0.22 W Package Weight T g 6.2 inlbf 10 Torque Mounting Torque ( TO-264Package), 4.40 or M3 screw 1.1 Nm Microsemi Website - Static Characteristics T = 25C unless otherwise speci ed APT75M50B2 L J Symbol Parameter Test Conditions Min Typ Max Unit V V = 0V, I = 250 A Drain-Source Breakdown Voltage 500 V BR(DSS) GS D V /T Reference to 25C, I = 250 A Breakdown Voltage Temperature Coef cient 0.60 V/C BR(DSS) J D V = 10V, I = 37A R 3 Drain-Source On Resistance 0.064 0.075 DS(on) GS D V Gate-Source Threshold Voltage 3 4 5 V GS(th) V = V , I = 2.5mA GS DS D V /T Threshold Voltage Temperature Coef cient -10 mV/C GS(th) J V = 500V T = 25C 100 DS J I Zero Gate Voltage Drain Current A DSS V = 0V T = 125C 500 GS J I V = 30V Gate-Source Leakage Current 100 nA GSS GS Dynamic Characteristics T = 25C unless otherwise speci ed J Symbol Parameter Test Conditions Min Typ Max Unit g V = 50V, I = 37A fs Forward Transconductance 55 S DS D C Input Capacitance 11600 iss V = 0V, V = 25V GS DS C Reverse Transfer Capacitance 160 rss f = 1MHz C Output Capacitance 1250 oss pF 4 C Effective Output Capacitance, Charge Related 725 o(cr) V = 0V, V = 0V to 333V GS DS 5 C Effective Output Capacitance, Energy Related 365 o(er) Q Total Gate Charge 290 g V = 0 to 10V, I = 37A, GS D Q Gate-Source Charge 65 nC gs V = 250V DS Q Gate-Drain Charge gd 130 t Resistive Switching Turn-On Delay Time 45 d(on) t V = 333V, I = 37A Current Rise Time 55 r DD D ns 6 t R = 2.2 , V = 15V Turn-Off Delay Time 120 d(off) G GG t Current Fall Time 39 f Source-Drain Diode Characteristics Symbol Parameter Test Conditions Min Typ Max Unit Continuous Source Current D MOSFET symbol I S 75 showing the (Body Diode) integral reverse p-n A G Pulsed Source Current junction diode I SM 230 (body diode) 1 S (Body Diode) V I = 37A, T = 25C, V = 0V Diode Forward Voltage 1 V SD SD J GS 3 t I = 37A Reverse Recovery Time 695 ns rr SD Q di /dt = 100A/s, T = 25C Reverse Recovery Charge 17 C rr SD J I 37A, di/dt 1000A/ s, V = 333V, SD DD V/ns dv/dt Peak Recovery dv/dt 8 T = 125C J 1 Repetitive Rating: Pulse width and case temperature limited by maximum junction temperature. 2 Starting at T = 25C, L = 2.31mH, R = 25, I = 37A. J G AS 3 Pulse test: Pulse Width < 380 s, duty cycle < 2%. 4 C is de ned as a xed capacitance with the same stored charge as C with V = 67% of V . o(cr) OSS DS (BR)DSS 5 C is de ned as a xed capacitance with the same stored energy as C with V = 67% of V . To calculate C for any value of o(er) OSS DS (BR)DSS o(er) V less than V use this equation: C = -1.65E-7/V 2 + 5.51E-8/V + 2.03E-10. DS (BR)DSS, o(er) DS DS 6 R is external gate resistance, not including internal gate resistance or gate driver impedance. (MIC4452) G Microsemi reserves the right to change, without notice, the speci cations and information contained herein. 050-8082 Rev E 8-2011