TO-247 APT7F100B APT7F100S 1000V, 7A, 2.0 Max N-Channel FREDFET POWER MOS 8 is a high speed, high voltage N-channel switch-mode power 3 D PAK MOSFET. This FREDFET version has a drain-source (body) diode that has been opti- mized for high reliability in ZVS phase shifted bridge and other circuits through reduced t , soft recovery, and high recovery dv/dt capability. Low gate charge, high gain, and a rr greatly reduced ratio of C /C result in excellent noise immunity and low switching rss iss APT7F100B APT7F100S loss. The intrinsic gate resistance and capacitance of the poly-silicon gate structure help control di/dt during switching, resulting in low EMI and reliable paralleling, even Single die FREDFET when switching at very high frequency. FEATURES TYPICAL APPLICATIONS Fast switching with low EMI ZVS phase shifted and other full bridge Low t for high reliability Half bridge rr Ultra low C for improved noise immunity PFC and other boost converter rss Low gate charge Buck converter Avalanche energy rated Single and two switch forward RoHS compliant Flyback Absolute Maximum Ratings Symbol Parameter Ratings Unit Continuous Drain Current T = 25C 7 C I D Continuous Drain Current T = 100C 5 A C 1 I Pulsed Drain Current 27 DM V Gate-Source Voltage 30 V GS E 2 415 Single Pulse Avalanche Energy mJ AS I 4 AR Avalanche Current, Repetitive or Non-Repetitive A Thermal and Mechanical Characteristics Min Typ Max Unit Symbol Characteristic P Total Power Dissipation T = 25C 290 W D C R 0.43 Junction to Case Thermal Resistance JC C/W R 0.15 Case to Sink Thermal Resistance, Flat, Greased Surface CS T ,T Operating and Storage Junction Temperature Range -55 150 J STG C T Soldering Temperature for 10 Seconds (1.6mm from case) 300 L oz 0.22 W Package Weight T g 6.2 inlbf 10 Torque Mounting Torque ( TO-247 Package), 6-32 or M3 screw 1.1 Nm Microsemi Website - Static Characteristics T = 25C unless otherwise specified APT7F100B S J Symbol Parameter Test Conditions Min Typ Max Unit V V = 0V, I = 250A Drain-Source Breakdown Voltage 1000 V BR(DSS) GS D V /T Reference to 25C, I = 250A Breakdown Voltage Temperature Coeffi cient 1.15 V/C BR(DSS) J D V = 10V, I = 4A R 3 Drain-Source On Resistance 1.76 2.0 DS(on) GS D V Gate-Source Threshold Voltage 2.5 4 5 V GS(th) V = V , I = 0.5mA GS DS D V /T Threshold Voltage Temperature Coefficient -10 mV/C GS(th) J V = 1000V T = 25C 250 DS J I Zero Gate Voltage Drain Current A DSS V = 0V T = 125C 1000 GS J V = 30V I Gate-Source Leakage Current 100 nA GSS GS Dynamic Characteristics T = 25C unless otherwise specified J Symbol Parameter Test Conditions Min Typ Max Unit g V = 50V, I = 4A fs Forward Transconductance 7.5 S DS D C Input Capacitance 1800 iss V = 0V, V = 25V GS DS C Reverse Transfer Capacitance 25 rss f = 1MHz C Output Capacitance 158 oss pF 4 C Effective Output Capacitance, Charge Related 65 o(cr) V = 0V, V = 0V to 670V GS DS 5 C Effective Output Capacitance, Energy Related 33 o(er) Q Total Gate Charge 58 g V = 0 to 10V, I = 4A, GS D Q Gate-Source Charge 10 nC gs V = 500V DS Q Gate-Drain Charge gd 27 t Resistive Switching Turn-On Delay Time 24 d(on) t V = 670V, I = 4A Current Rise Time 26 r DD D ns 6 t R = 10 , V = 15V Turn-Off Delay Time 77 d(off) G GG t Current Fall Time 22 f Source-Drain Diode Characteristics Symbol Parameter Test Conditions Min Typ Max Unit Continuous Source Current MOSFET symbol I S 7 showing the (Body Diode) integral reverse p-n A Pulsed Source Current junction diode I 27 SM (body diode) 1 (Body Diode) V I = 4A, T = 25C, V = 0V Diode Forward Voltage 1.2 V SD SD J GS T = 25C 133 152 J t Reverse Recovery Time ns rr T = 125C 209 251 J 3 I = 4A T = 25C .56 SD J Q Reverse Recovery Charge C rr di /dt = 100A/s T = 125C 1.2 SD J V = 100V T = 25C 7 DD J I Reverse Recovery Current A rrm T = 125C 9 J I 4A, di/dt 1000A/s, V = 500V, SD DD dv/dt Peak Recovery dv/dt V/ns 25 T = 125C J 1 Repetitive Rating: Pulse width and case temperature limited by maximum junction temperature. 2 Starting at T = 25C, L = 53mH, R = 25, I = 4A. J G AS 3 Pulse test: Pulse Width < 380s, duty cycle < 2%. 4 C is defined as a fixed capacitance with the same stored charge as C with V = 67% of V . o(cr) OSS DS (BR)DSS 5 C is defined as a fixed capacitance with the same stored energy as C with V = 67% of V . To calculate C for any value of o(er) OSS DS (BR)DSS o(er) V less than V use this equation: C = -3.43E-8/V 2 + 1.44E-8/V + 5.38E-11. DS (BR)DSS, o(er) DS DS 6 R is external gate resistance, not including internal gate resistance or gate driver impedance. (MIC4452) G Microsemi reserves the right to change, without notice, the specifications and information contained herein. 050-8166 Rev B 05-2009