Features Fast read access time 70ns Dual voltage range operation Unregulated battery power supply range, 2.7V to 3.6V, or Standard power supply range, 5V 10% Pin compatible with JEDEC standard Atmel AT27C256R Low-power CMOS operation 20A max standby (less than 1A, typical) for V = 3.6V CC 29mW max active at 5MHz for V = 3.6V CC 256K (32K x 8) JEDEC standard surface mount package Unregulated Battery 32-lead PLCC High-reliability CMOS technology Voltage, High- 2,000V ESD protection speed, One-time 200mA latchup immunity Programmable, Rapid programming algorithm 100s/byte (typical) CMOS- and TTL-compatible inputs and outputs Read-only Memory JEDEC standard for LVTTL and LVBO Integrated product identification code Industrial temperature range Atmel AT27BV256 Green (Pb/halide-free) packaging option 1. Description The Atmel AT27BV256 is a high-performance, low-power, low-voltage, 262,144-bit, one- time programmable, read-only memory (OTP EPROM) organized as 32K by 8 bits. It requires only one supply in the range of 2.7V to 3.6V in normal read mode operation, mak- ing it ideal for fast, portable systems using either regulated or unregulated battery power. The Atmel innovative design techniques provide fast speeds that rival 5V parts, while keep- ing the low power consumption of a 3V supply. At V = 2.7V, any word can be accessed in CC less than 70ns. With a typical power dissipation of only 18mW at 5 MHz and V = 3V, the CC AT27BV256 consumes less than one-fifth the power of a standard, 5V EPROM. Standby mode supply current is typically less than 1A at 3V. The AT27BV256 simplifies system design and stretches battery lifetime even further by eliminating the need for power supply regulation. The AT27BV256 is available in an industry-standard, JEDEC-approved ,one-time program- mable (OTP) PLCC package. All devices feature two-line control (CE, OE) to give designers the flexibility to prevent bus contention. The AT27BV256 operating with V at 3.0V produces TTL-level outputs that are compatible CC with standard TTL logic devices operating at V = 5.0V. At V = 2.7V, the part is compati- CC CC ble with JEDEC-approved, low-voltage battery operation (LVBO) interface specifications. The device is also capable of standard, 5V operation, making it ideally suited for dual supply range systems or card products that are pluggable in both 3V and 5V hosts. The AT27BV256 has additional features to ensure high quality and efficient production use. The rapid programming algorithm reduces the time required to program the part and guar- antees reliable programming. Programming time is typically only 100s/byte. The 0601FEPROM4/11 integrated product identification code electronically identifies the device and manufacturer.This feature is used by industry-standard programming equipment to select the proper programming algorithms and voltages. The AT27BV256 programs in exactly the same way as a standard, 5V Atmel AT27C256R, and uses the same programming equipment. 2. Pin configurations 32-lead PLCC Pin name Function Top view A0 - A14 Addresses O0 - O7 Outputs A6 5 29 A8 CE Chip enable A5 6 28 A9 OE Output enable A4 7 27 A11 A3 8 26 NC NC No connect A2 9 25 OE A1 10 24 A10 A0 11 23 CE NC 12 22 O7 O0 13 21 O6 Note: PLCC package pins 1 and 17 are dont connect. 3. System considerations Switching between active and standby conditions via the chip enable pin may produce transient voltage excursions. Unless accommodated by the system design, these transients may exceed datasheet limits, resulting in device non-conformance. At a minimum, a 0.1F, high-frequency, low inherent inductance, ceramic capacitor should be utilized for each device. This capacitor should be connected between the V and ground terminals of the device, as close to the device as possible. CC Additionally, to stabilize the supply voltage level on printed circuit boards with large EPROM arrays, a 4.7F bulk electrolytic capacitor should be utilized, again connected between the V and ground terminals. This capacitor should be positioned as CC close as possible to the point where the power supply is connected to the array. Figure 3-1. Block diagram 2 Atmel AT27BV256 0601FEPROM4/11 O1 14 4 A7 O2 15 3 A12 GND 16 2 VPP NC 17 1 NC O3 18 32 VCC O4 19 31 A14 O5 20 30 A13