AT40K05AL, AT40K10AL AT40K20AL, AT40K40AL 5K 50K Gates Coprocessor FPGA with FreeRAM DATASHEET Features Ultra High Performance System Speeds to 100MHz Array Multipliers > 50MHz 10ns Flexible SRAM Internal Tri-state Capability in Each Cell FreeRAM Flexible, Single/Dual Port, Synchronous/Asynchronous 10ns SRAM 2,048 18,432 bits of Distributed SRAM Independent of Logic Cells 128 384 PCI Compliant I/Os Programmable Output Drive Fast, Flexible Array Access Facilitates Pin Locking Pin-compatible with XC4000 and XC5200 FPGAs Eight Global Clocks Fast, Low Skew Clock Distribution Programmable Rising/Falling Edge Transitions Distributed Clock Shutdown Capability for Low Power Management Global Reset/Asynchronous Reset Options Four Additional Dedicated PCI Clocks Cache Logic Dynamic Full/Partial Re-configurability In-System Unlimited Re-programmability via Serial or Parallel Modes Enables Adaptive Designs Enables Fast Vector Multiplier Updates Pin-compatible Package Options Low-profile, Plastic Quad Flat Packs (LQFP and PQFP) User-friendly Design Tools Supoorted by industry standard EDA tools such as Precision Synthesis, Leondardo Spectrum, Synplify, and Others Timing Driven Placement and Routing Automatic/Interactive Multi-chip Partitioning Fast, Efficient Synthesis Over 75 Automatic Component Generators Create 1000s of Reusable, Fully Deterministic Logic, and RAM Functions Supply Voltage 3.3V 5V I/O Tolerant Atmel-2818G-FPGA-AT40KAL-Series-Datasheet 092013(1) Table 1. AT40KAL Family Device AT40K05AL AT40K10AL AT40K20AL AT40K40AL Usable Gates 5K 10K 10K 20K 20K 30K 40K 50K Rows x Columns 16 x 16 24 x 24 32 x 32 48 x 48 Cells 256 576 1,024 2,304 (1) (1) (1) (1) Registers 496 954 1,520 3,048 RAM Bits 2,048 4,608 8,192 18,432 I/O (Maximum) 128 192 256 384 Note: 1. Packages with FCK will have eight less registers. 1. Description The AT40KAL is a family of fully PCI-compliant, SRAM-based FPGAs with distributed 10ns programmable synchronous/asynchronous, dual-port/single-port SRAM, eight global clocks, Cache Logic ability (partially or fully reconfigurable without loss of data), automatic component generators, and range in size from 5,000 to 50,000 usable gates. I/O counts range from 114 to 161 in industry standard packages ranging from 144-pin LQFP to 208-pin PQFP, and support 3.3V designs. The AT40KAL is designed to quickly implement high-performance, large gate count designs through the use of synthesis and schematic-based tools used on a PC or Sun platform. The Atmel design tools provide seamless integration with industry standard tools such as Synplicity, ModelSim, Exemplar, and Viewlogic. The AT40KAL can be used as a coprocessor for high-speed (DSP/processor-based) designs by implementing a variety of computation intensive, arithmetic functions. These include adaptive finite impulse response (FIR) filters, fast Fourier transforms (FFT), convolvers, interpolators and discrete-cosine transforms (DCT) that are required for video compression and decompression, encryption, convolution, and other multimedia applications. 1.1 Fast, Flexible, and Efficient SRAM The AT40KAL FPGA offers a patented distributed 10ns SRAM capability where the RAM can be used without losing logic resources. Multiple independent, synchronous or asynchronous, and dual-port or single-port RAM functions (FIFO, scratch pad, etc.) can be created using Atmels macro generator tool. 1.2 Fast, Efficient Array, and Vector Multipliers The AT40KALs patented 8-sided core cell with direct horizontal, vertical and diagonal cell-to-cell connections implements ultra fast array multipliers without using any busing resources. The AT40KAL Cache Logic capability enables a large number of design coefficients and variables to be implemented in a very small amount of silicon, enabling vast improvement in system speed at much lower cost than conventional FPGAs. 2 AT40KAL Series FPGA Datasheet Atmel-2818G-FPGA-AT40KAL-Series-Datasheet 092013