Features 80C51 Core Architecture 256 Bytes of On-chip RAM 256 Bytes of On-chip XRAM 16K Bytes of On-chip Flash Memory Data Retention: 10 Years at 85C Erase/Write Cycle: 100K 2K Bytes of On-chip Flash for Bootloader 2K Bytes of On-chip EEPROM Erase/Write Cycle: 100K 14-sources 4-level Interrupts Low Pin Count Three 16-bit Timers/Counters Full Duplex UART Compatible 80C51 8-bit Maximum Crystal Frequency 40 MHz. In X2 Mode, 20 MHz (CPU Core, 40 MHz) Three or Four Ports: 16 or 20 Digital I/O Lines Microcontroller Two-channel 16-bit PCA PWM (8-bit) with A/D High-speed Output Timer and Edge Capture Converter and Double Data Pointer 21-bit Watchdog Timer (7 Programmable bits) 16 KBytes Flash A 10-bit Resolution Analog-to-Digital Converter (ADC) with 8 Multiplexed Inputs Power-saving Modes Memory Idle Mode Power-down Mode Power Supply: 3 Volts to 5.5 Volts Temperature Range: Industrial (-40 to +85C) T89C5115 Packages: SOIC28, SOIC24, PLCC28, VQFP32 AT89C5115 Rev. 4128G805102/08Description The T89C5115 is a high performance Flash version of the 80C51 single chip 8-bit micro- controllers. It contains a 16-KB Flash memory block for program and data. The 16-KB Flash memory can be programmed either in parallel mode or in serial mode with the ISP capability or with software. The programming voltage is internally gener- ated from the standard VCC pin. The T89C5115 retains all features of the 80C52 with 256 bytes of internal RAM, a 7- source 4-level interrupt controller and three timer/counters. In addition, the T89C5115 has a 10-bit A/D converter, a 2-KB Boot Flash memory, 2-KB EEPROM for data, a Pro- grammable Counter Array, an XRAM of 256 bytes, a Hardware WatchDog Timer and a more versatile serial channel that facilitates multiprocessor communication (EUART). The fully static design of the T89C5115 reduces system power consumption by bringing the clock frequency down to any value, even DC, without loss of data. The T89C5115 has two software-selectable modes of reduced activity and an 8 bit clock prescaler for further reduction in power consumption. In the idle mode the CPU is frozen while the peripherals and the interrupt system are still operating. In the power-down mode the RAM is saved and all other functions are inoperative. The added features of the T89C5115 make it more powerful for applications that need A/D conversion, pulse width modulation, high speed I/O and counting capabilities such as industrial control, consumer goods, alarms, motor control, etc. While remaining fully compatible with the 80C52 it offers a superset of this standard microcontroller. In X2 mode a maximum external clock rate of 20 MHz reaches a 300 ns cycle time. Block Diagram RAM Flash Boot EE XRAM PCA UART Timer 2 256x8 16K x loader PROM 256 x 8 8 2K x 8 2K x 8 XTAL1 C51 CORE IB-bus XTAL2 CPU Timer 0 INT Parallel I/O Ports Watch 10-bit Ctrl Timer 1 Dog ADC Port 1 Port 2 Port 3 Port 4 Note: 1. 8 analog Inputs/8 Digital I/O. 2. 2-bit I/O Port. 2 AT89C5115 4128G805102/08 RESET T0 RxD T1 TxD INT0 INT1 Vcc Vss P1(1) P2(2) P3 P4(2) ECI PCA T2EX VAREF T2 VAVCC VAGND