DSC2010
Low-Jitter Configurable CMOS Oscillator
General Description Features
The DSC2010 series of high performance Low RMS Phase Jitter: <1 ps (typ)
CMOS oscillators utilize a proven silicon
High Stability: 10, 25, 50 ppm
MEMS technology to provide excellent jitter
and stability while incorporating additional Wide Temperature Range
device functionality. The DSC2010 allows
o Automotive: -55 to 125 C
the user to easily modify the frequency and
o Ext. Industrial: -40 to 105 C
drive strength of the oscillator using pins.
o Industrial: -40 to 85 C
The DSC2010 has provision for up to four
o Ext. commercial: -20 to 70 C
user-defined pre-programmed, pin-selectable
output frequencies, and eight pin-selectable
High Supply Noise Rejection: -50 dBc
output drive levels to help reduce EMI.
Pin-Selectable Configurations
o 3-bit Output Drive Strength
DSC2010 is packaged in a 14-pin 3.2x2.5
o 2-bit Output Frequency Combinations
mm QFN package and available in
temperature grades from Ext. Commercial to
Short Lead Times: 2 Weeks
Automotive.
Wide Freq. Range:
o CMOS Output: 2.3 to 170 MHz
Miniature Footprint of 3.2x2.5mm
Excellent Shock & Vibration Immunity
o Qualified to MIL-STD-883
High Reliability
Block Diagram
o 20x better MTF than quartz oscillators
Supply Range of 2.25 to 3.6 V
Lead Free & RoHS Compliant
Applications
Consumer Electronics
Storage Area Networks
o SATA, SAS, Fibre Channel
Passive Optical Networks
o EPON, 10G-EPON, GPON, 10G-PON
Ethernet
o 1G, 10GBASE-T/KR/LR/SR, and FCoE
HD/SD/SDI Video & Surveillance
PCI Express
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DSC2010 Page 1 MK-Q-B-P-D-12042601-2 Low-Jitter Configurable CMOS Oscillator
DSC2010
Pin Description
Pin No. Pin Name Pin Type Description
1 Enable I Enables outputs when high and disables when low
2 NC NA Leave unconnected or grounded
3 NC NA Leave unconnected or grounded
4 GND Power Ground
5 FS0 I Least significant bit for frequency selection
6 FS1 I Most significant bit for frequency selection
7 NC NA Leave unconnected or grounded
8 Output O CMOS output
9 OS0 I Least significant bit for output drive strength selection
10 OS1 I Middle bit for output drive strength selection
11 NC NA Leave unconnected or grounded
12 VDD2 Power Power Supply
13 VDD Power Power Supply
14 OS2 I Most significant bit for output drive strength selection
Operational Description
The DSC2010 is a CMOS oscillator consisting The DSC2010 has programmable output drive
of a MEMS resonator and a support PLL IC. strength. Using three control pins (OS0-OS2)
The CMOS output is generated through the drive strength can be adjusted to match
independent 8-bit programmable dividers from circuit board impedances to reduce power
the output of the internal PLL. supply noise, overshoot/undershoot and EMI.
Table 1 displays typical rise / fall times for the
The actual frequency output by the DSC2010
output with a 15pf load capacitance as a
is controlled by an internal pre-programmed
function of these control pins at VDD=3.3V
memory (OTP). This memory stores all
and room temperature.
coefficients required by the PLL for up to four
different frequencies. Two control pins (FS0 Table 1. Rise/Fall times for drive strengths
FS1) select the output frequency. Discera
Output Drive Strength Bits
supports customer defined versions of the
[OS2, OS1, OS0] - Default [111]
DSC2010. Standard frequency options are
000 001 010 011 100 101 110 111
described in the following sections.
tr (ns) 2.1 1.7 1.6 1.4 1.3 1.3 1.2 1.1
When Enable (pin 1) is floated or connected to
tf (ns) 2.5 2.4 2.4 2.2 1.8 1.6 1.4 1.4
VDD, the DSC2010 is in operational mode.
Driving Enable to ground will disable the
output driver (hi-impedance mode).
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DSC2010 Page 2 MK-Q-B-P-D-12042601-2