DSPIC33FJ32GP202-I/SP Microchip

dsPIC33FJ32GP202/204 and dsPIC33FJ16GP304 16-Bit Digital Signal Controllers with Advanced Analog Operating Conditions Timers/Output Compare/Input Capture 3.0V to 3.6V, -40C to +150C, DC to 20 MIPS Three 16-bit timers/counters can pair up two to make one 32-bit 3.0V to 3.6V, -40C to +125C, DC to 40 MIPS Two OC modules, configurable as timers/counters Four IC modules Core: 16-Bit dsPIC33F CPU Peripheral Pin Select (PPS) to allow function Code-efficient (C and Assembly) architecture remap Two 40-bit wide accumulators Single-cycle (MAC/MPY) with dual data fetch Communication Interfaces Single-cycle, mixed-sign MUL plus hardware One UART module (10 Mbps) divide - With support for LIN/J2602 protocols and IrDA Clock Management One 4-wire SPI module (15 Mbps) 2% internal oscillator 2 One I C module (up to 1 Mbaud) with Programmable PLLs and oscillator clock sources SMBus support Fail-Safe Clock Monitor (FSCM) PPS to allow function remap Independent Watchdog Timer (WDT) Fast wake-up and start-up Input/Output Sink/Source up to 10 mA (pin-specific) for Power Management standard VOH/VOL, up to 16 mA (pin-specific) for Low-power management modes (Sleep, Idle, non-standard VOH1 Doze) 5V tolerant pins Integrated Power-on Reset and Brown-out Reset Selectable open-drain, pull-ups, and pull-downs 1.35 mA/MHz dynamic current (typical) Up to 5 mA overvoltage clamp current 55 A IPD current (typical) External interrupts on all I/O pins Advanced Analog Features Qualification and Class B Support ADC module: AEC-Q100 REVG (Grade 1 -40C to +125C) - Configurable as 10-bit, 1.1 Msps with AEC-Q100 REVG (Grade 0 -40C to +150C) four S/H (Sample-and-Hold) or 12-bit, Class B Safety Library, IEC 60730 500 ksps with one S/H - Ten analog inputs on 28-pin devices and up Debugger Development Support to 13 analog inputs on 44-pin devices In-circuit and in-application programming Flexible and independent ADC trigger sources Two program and two complex data breakpoints IEEE 1149.2-compatible (JTAG) boundary scan Trace and run-time watch 2007-2011 Microchip Technology Inc. DS70290J-page 1dsPIC33FJ32GP202/204 and dsPIC33FJ16GP304 dsPIC33FJ32GP202/204 and dsPIC33FJ16GP304 Product Families The device names, pin counts, memory sizes and peripheral availability of each family are listed below, followed by their pinout diagrams. TABLE 1: dsPIC33FJ32GP202/204 and dsPIC33FJ16GP304 CONTROLLER FAMILIES Remappable Peripherals Device (1) 3 dsPIC33FJ32GP202 28 32 2 16 3 42 1 1 1 ADC, 1 21 SPDIP 10 ch SOIC SSOP QFN-S (1) 26 dsPIC33FJ32GP204 44 32 2 3 4 2 1 3 1 1 ADC, 135 QFN 13 ch TQFP (1) 26 dsPIC33FJ16GP304 44 16 2 3 4 2 1 3 1 1 ADC, 135 QFN 13 ch TQFP Note 1: Only two out of three timers are remappable. 2: Only two out of three interrupts are remappable. DS70290J-page 2 2007-2011 Microchip Technology Inc. Pins Program Flash Memory (Kbytes) RAM (Kbytes) Remappable Pins 16-Bit Timer Input Capture Output Compare Std. PWM UART (2) External Interrupts SPI 10-Bit/12-Bit ADC 2 I C I/O Pins (Max) Packages