HV57009PG-G Microchip

HV57009 64-Channel Serial to Parallel Converter with P-Channel Open Drain Controllable Output Current Features General Description The HV57009 is a low-voltage serial to high-voltage parallel HVCMOS technology converter with P-channel open drain outputs. This device has 5.0V CMOS Logic been designed for use as a driver for plasma panels. Output voltage up to -85V Output current source control The device has two parallel 32-bit shift registers, permitting data 16MHz equivalent data rate rates twice the speed of one (they are clocked together). There Latched data outputs are also 64 latches and control logic to perform the blanking of the outputs. HV 1 is connected to the rst stage of the rst Forward and reverse shifting options (DIR pin) OUT shift register through the blanking logic. Data is shifted through Diode to VDD allows efcient power recovery the shift registers on the logic low to high transition of the clock. Hi-Rel processing available The DIR pin causes CCW shifting when connected to VSS, and CW shifting when connected to VDD. A data output buffer is provided for cascading devices. This output reects the current status of the last bit of the shift register (HV 64). Operation of OUT the shift register is not affected by the LE (latch enable), or the BL (blanking) inputs. Transfer of data from the shift registers to latches occurs when the LE input is high. The data in the latches is stored when LE is low. The HV570 has 64 channels of output constant current sourcing capability. They are adjustable from 0.1 to 2.0mA through one external resistor or a current source. Functional Block Diagram LE BL VDD D 2A D 1A I/O I/O I/O HV 1 Latch OUT DIR HV 2 OUT SR1 CLK HV 3 OUT Latch HV 32 OUT Latch HV 33 OUT SR2 HV 34 OUT HV 35 OUT Latch Programmabl e I/O Curren t HV 64 OUT D 2B D 1B I/O I/O VSS VBP +IN -IN Note: Each SR (shift register) provides 32 outputs. SR1 supplies outputs 1 to 32 and SR2 supplies outputs 33 to 64. 1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.comHV57009 Ordering Information Package Options 80-Lead PQFP Device 20.00x14.00mm body Die 3.4mm height (max) 0.65mm pitch HV57009 HV57009PG-G HV57009X -G indicates package is RoHS compliant (Green) Pin Conguration Absolute Maximum Ratings Parameter Value 1 Supply voltage, V -0.5V to +7.5V DD 1 Output voltage , V V + 0.5V to -95V NN DD 1 Logic input levels -0.3V to V +0.3V DD 2 Ground current 1.5A 3 80 Continuous total power dissipation 1200mW 1 Operating temperature range -40C to +85C 80-Lead PQFP (PG) Storage temperature range -65C to +150C 4 Product Marking Lead temperature 260C L = Lot Number Absolute Maximum Ratings are those values beyond which damage to the HV57009PG YY = Year Sealed device may occur. Functional operation under these conditions is not implied. LLLLLLLLLL Continuous operation of the device at the absolute rating level may affect WW = Week Sealed device reliability. YYWW C = Country of Origin CCCCCCCC AAA A = Assembler ID Notes: = Green Packaging 1. All voltages are referenced to V . SS 2. Duty cycle is limited by the total power dissipated in the package. 80-Lead PQFP (PG) 3. For operation above 25C ambient derate linearly to maximum operating temperature at 20mW/C. 4. 1.6mm (1/16inch) from case for 10 seconds Recommended Operating Conditions Sym Parameter Min Max Units V Logic supply voltage 4.5 5.5 V DD HV HV output off voltage -85 V V OUT DD V High-level input voltage V -1.2V V V IH DD DD V Low-level input voltage 0 1.2 V IL 8.0 f Clock frequency per register DC MHz CLK 4.5 T Operating free-air temperature -40 +85 C A Notes: Power-up sequence should be the following: 1. Connect ground 2. Apply V DD 3. Set all inputs to a known state Power-down sequence should be the reverse of the above. 1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com 2