FIFO, Flow Control, VLAN Tagging, Priority KS8995XA Product Brief Revision 2.0 Integrated 5-Port 10/100 QoS Switch The KS8995XA is a highly integrated Layer-2 QoS Features switch with optimized BOM (Bill of Materials) cost for Integrated switch with five MACs and five Fast Ethernet low port count, cost-sensitive 10/100Mbps switch transceivers fully compliant to IEEE 802.3u standard systems. It also provides an extensive feature set including Shared memory based switch fabric with fully non- three different QoS priority schemes, dual MII interface blocking configuration for BOM cost reduction, programmable rate limiting to 10BaseT, 100BaseTX and 100BaseFX modes (FX offload CPU tasks, software & hardware power-down, in Ports 4 and 5) MDC/MDIO control interface and port monitoring to effectively address both current and emerging Fast Dual MII configuration: MII-Switch (MAC or PHY Ethernet applications. mode MII) and MII-P5 (PHY mode MII) The KS8995XA contains five 10/100 transceivers VLAN ID tag/untag options, per-port basis with patented mixed-signal low-power technology, five Programmable rate limiting, ingress and egress port, rate MAC (Media Access Control) units, a high-speed non- options for high and low priority, per port basis blocking switch fabric, a dedicated address lookup engine, Flow control or drop packet rate limiting (ingress port) and an on-chip frame buffer memory. Broadcast storm protection with percent control global All PHY units support 10Base-T and 100BaseTX. and per-port basis In addition, two of the PHY units support 100BaseFX Optimization for fiber-to-copper media conversion (Ports 4 and 5). Full-chip hardware power-down support (register configuration not saved) Per-port based software power-save on PHY (idle link detection, register configuration preserved) Block Diagram 10/100 10/100 Auto 1K look-up MDI/MDIX T/Tx 1 MAC 1 Engine 10/100 10/100 Auto MDI/MDIX T/Tx 2 MAC 2 Queue Mgmnt 10/100 10/100 Auto MDI/MDIX T/Tx 3 MAC 3 Buffer 10/100 10/100 Auto Mgmnt T/Tx/Fx 4 MAC 4 MDI/MDIX 10/100 10/100 Auto Frame T/Tx/Fx 5 MAC 5 MDI/MDIX Buffers MII-P5 MDC, MDI/O SNI MII-SW or SNI LED0 5:1 LED1 5:1 LED I/F Control EEPROM LED2 5:1 Registers I/F KS8995XA Micrel Semiconductor TEL: 1.408.944.0800 FAX: 1.408.955.1666 HTTP:// www.micrel.com 1Features Applications Broadband gateway/firewall/VPN QoS/CoS packets prioritization supports: per port, Integrated DSL or cable modem multi-port router 802.1p and DiffServ based 802.1p/q tag insertion or removal on a per port basis Wireless LAN access point plus gateway (egress) Home networking expansion Standalone 10/100 switch Port-based VLAN support Hotel/campus/MxU gateway MDC and MDI/O interface support to access the MII Enterprise VoIP gateway/phone PHY control registers (not all control registers) MII local loopback support FTTx customer premise equipment On-chip 64kB memory for frame buffering (not Media converter shared with 1K unicast address table) 1.4Gbps high performance memory bandwidth Wire-speed reception and transmission Integrated look-up engine with dedicated 1K unicast MAC addresses Automatic address learning, address aging and address migration Full duplex IEEE 802.3x and half-duplex back pressure flow control Comprehensive LED support 7-wire SNI support for legacy MAC interface Automatic MDI/MDI-X crossover for plug-and-play Low power, 1.8V, 2.5V or 3.3V, 0.18 m CMOS technology Available in 128-pin PQFP package Micrel Semiconductor TEL: 1.408.944.0800 FAX: 1.408.955.1666 HTTP://www.micrel.com 2