MCP2518FD External CAN FD Controller with SPI Interface Oscillator Options Features 40, 20 or 4 MHz Crystal or Ceramic Resonator General External Clock Input External CAN FD Controller with Serial Peripheral Clock Output with Prescaler Interface (SPI) SPI Interface Arbitration Bit Rate up to 1 Mbps Up to 20 MHz SPI clock speed Data Bit Rate up to 8 Mbps Supports SPI Modes 0,0 and 1,1 CAN FD Controller modes Registers and bit fields are arranged in a way to - Mixed CAN 2.0B and CAN FD Mode enable efficient access through SPI - CAN 2.0B Mode Safety Critical Systems Conforms to ISO 11898-1:2015 SPI commands with CRC to detect noise on SPI Message FIFOs interface 31 FIFOs, configurable as Transmit or Receive Error Correction Code (ECC) protected RAM FIFOs Additional Features One Transmit Queue (TXQ) GPIO pins: INT0 and INT1 can be configured as Transmit Event FIFO (TEF) with 32 bit time stamp general purpose I/O Message Transmission Open drain outputs: TXCAN, INT, INT0, and INT1 Message transmission prioritization: pins can be configured as push/pull or open drain - Based on priority bit field outputs - Message with lowest ID gets transmitted first Package Types using the Transmit Queue (TXQ) MCP2518FD Programmable automatic retransmission SOIC14 attempts: unlimited, 3 attempts or disabled Message Reception TXCAN 1 14 VDD 32 Flexible Filter and Mask Objects RXCAN 2 13 nCS Each object can be configured to filter either: CLKO/SOF 3 12 SDO - Standard ID + first 18 data bits, or INT 4 11 SDI - Extended ID OSC2 5 10 SCK 32-bit Time Stamp OSC1 6 9 INT0/GPIO0/XSTBY Special Features VSS 7 8 INT1/GPIO1 VDD: 2.7 to 5.5V Active Current: maximum 20 mA at 5.5 V, 40 MHz MCP2518FD VDFN14 with wettable flanks* CAN clock Sleep Current: 15 A, typical 1 14 TXCAN VDD Low Power Mode current: maximum 10 A from RXCAN 2 13 nCS 40C to 150C CLKO/SOF 3 12 SDO Message Objects are located in RAM: 2 KB EP* INT 4 11 SDI Up to 3 Configurable Interrupt Pins OSC2 5 10 SCK Bus Health Diagnostics and Error Counters OSC1 6 9 INT0/GPIO0/XSTBY Transceiver Standby Control 7 8 VSS INT1/GPIO1 Start of frame pin for indicating the beginning of messages on the bus Temperature Ranges: VDFN14 includes an Exposed Thermal Pad (EP) see - Extended (E): 40C to +125C Table 1-1 - High (H): 40C to +150C 2019 Microchip Technology Inc. DS20006027A-page 1MCP2518FD 1.0 DEVICE OVERVIEW 1.1 Block Diagram The MCP2518FD device is a cost-effective and Figure 1.1 shows the block diagram of the small-footprint CAN FD controller that can be easily MCP2518FD device. MCP2518FD contains the added to a microcontroller with an available SPI following main blocks: interface. A CAN FD channel can be easily added to a The CAN FD Controller module implements the microcontroller that is either lacking a CAN FD CAN FD protocol, and contains the FIFOs and peripheral or doesnt have enough CAN FD channels. Filters. MCP2518FD supports both CAN frames in the The SPI interface is used to control the device by Classical format (CAN2.0B) and CAN Flexible Data accessing Special Function Registers (SFR) and Rate (CAN FD) format, as specified in ISO RAM. 11898-1:2015. The RAM controller arbitrates the RAM accesses The MCP2518FD device was improved as follows: between the SPI and CAN FD Controller module. The Message RAM is used to store the data of the Added Low Power Mode (LPM), in order to Message Objects. reduce leakage current to 10 A over the full temperature range. The oscillator generates the CAN clock. Extended SEQ field in Transmit Message Object The Internal LDO and POR circuit. and Transmit Event FIFO Object from 7 to 23 bits. The I/O control. Added DEVID register to distinguish between future members of the device family. Note 1: This data sheet summarizes the features Switched to saw cut DFN package with wettable of the MCP2518FD device. It is not flanks. intended to be a comprehensive reference source. To complement the information in this data sheet, refer to the related section of the MCP25xxFD Family Reference Manual. FIGURE 1-1: MCP2518FD BLOCK DIAGRAM VDD nCS Internal SPI LDO SCK VSS Interface SDI POR SDO CLKO/SOF I/O Message RAM RAM Controller INT INT0/GPIO0/XSTBY INT1/GPIO1 OSC1 CAN FD Oscillator Controller RXCAN RX OSC2 Module Filter TXCAN DS20006027A-page 2 2019 Microchip Technology Inc.