MCP2561/2 High-Speed CAN Transceiver Features: Description: Supports 1 Mb/s Operation The MCP2561/2 is a Microchip Technology Inc. second generation high-speed CAN transceiver. It serves as an Implements ISO-11898-2 and ISO-11898-5 interface between a CAN protocol controller and the Standard Physical Layer Requirements physical two-wire CAN bus. Very Low Standby Current (5 A, typical) The device meets the automotive requirements for VIO Supply Pin to Interface Directly to high-speed (up to 1 Mb/s), low quiescent current, CAN Controllers and Microcontrollers with electromagnetic compatibility (EMC) and electrostatic 1.8V to 5.5V I/O discharge (ESD). SPLIT Output Pin to Stabilize Common Mode in Biased Split Termination Schemes Package Types CAN Bus Pins are Disconnected when Device is Unpowered: MCP2561 MCP2562 PDIP, SOIC - An Unpowered Node or Brown-Out Event will PDIP, SOIC Not Load the CAN Bus TXD STBY 1 8 TXD STBY 1 8 Detection of Ground Fault: VSS CANH 2 7 VSS CANH 2 7 - Permanent Dominant Detection on TXD VDD 3 6 CANL VDD 3 6 CANL - Permanent Dominant Detection on Bus 4 5 RXD SPLIT 4 5 RXD VIO Power-on Reset and Voltage Brown-Out Protection on VDD Pin MCP2562 MCP2561 Protection Against Damage Due to Short-Circuit 3x3 DFN* 3x3 DFN* Conditions (Positive or Negative Battery Voltage) TXD 1 8 STBY TXD 1 8 STBY Protection Against High-Voltage Transients in VSS CANH Automotive Environments VSS CANH 2 7 2 7 EP EP 9 9 VDD 3 6 CANL VDD CANL Automatic Thermal Shutdown Protection 3 6 RXD 4 5 VIO RXD 4 5 SPLIT Suitable for 12V and 24V Systems Meets or exceeds stringent automotive design * Includes Exposed Thermal Pad (EP) see Table 1-2. requirements including Hardware Requirements for LIN, CAN and FlexRay Interfaces in Automo- tive Applications, Version 1.3, May 2012 High-Noise Immunity Due to Differential Bus Implementation High Electrostatic Discharge (ESD) Protection on CANH and CANL, meeting the IEC61000-4-2 up to 14 kV Available in PDIP-8L, SOIC-8L and 3x3 DFN-8L Temperature ranges: - Extended (E): -40C to +125C - High (H): -40C to +150C MCP2561/2 Family Members Device Feature Description MCP2561 Split pin Common mode stabilization MCP2562 VIO pin Internal level shifter on digital I/O pins Note: For ordering information, see the Product Identification System section on page 27. 2013-2014 Microchip Technology Inc. DS20005167C-page 1MCP2561/2 Block Diagram (2 ) (3) SPLIT VIO VDD Digital I/O Thermal POR VDD/2 Supply Protection UVLO VIO Permanent TXD Dominant Detect CANH Driver VIO and Slope Control CANL Mode STBY Control CANH Wake-Up (1) LP RX Filter CANL Receiver RXD CANH HS RX CANL VSS Note 1: There is only one receiver implemented. The receiver can operate in Low-Power or High-Speed mode. 2: Only MCP2561 has the SPLIT pin. 3: Only MCP2562 has the VIO pin. In MCP2561, the supply for the digital I/O is internally connected to VDD. DS20005167C-page 2 2013-2014 Microchip Technology Inc.