MDB1900ZC Zero Delay Buffer for PCIe (Gen1/Gen2/Gen3), SAS, SATA, ESI, and QPI General Description Features The MDB1900ZC is a true zero delay buffer with a fully Supports zero delay (0ps) buffer mode for 100MHz and integrated, high-performance, low-power, and low-phase 133MHz clock frequencies. noise programmable PLL. Internal feedback path for zero delay (PLL) mode The MDB1900ZC is capable of distributing the reference Zero delay (PLL) mode can filter jitter in incoming clock clocks for PCIe (Gen1/Gen2/Gen3), SATA, ESI, SAS, SMI, Selectable PLL bandwidth for PLL mode and Intel Quickpath Interconnect (QPI). The MDB1900ZC Supports fanout buffer mode for clock frequencies works in conjunction with a CK410B+, CK509B, or between 0MHz and 250MHz CK420BQ clock synthesizer to provide reference clocks to Differential input reference with HCSL logic (0V~0.7V) multiple agents. Nineteen differential HCSL-compatible clock output The MDB1900ZC is designed for Intels DB1900Z pairs specification with the exception that the zero delay buffer Eight dedicated OE pins to control their assigned feedback path is inside the IC and does not need to be output. Glitch free assertion/de-assertion. built onto the PCB. Spread spectrum modulation tolerant for EMI reduction Datasheets and support documentation are available on SMBus interface for controlling output properties Micrels website at: www.micrel.com. (enable/disable and delay tuning) Block Diagram Disabled outputs in power-down mode for maximum power savings Nine selectable SMBus addresses so multiple devices can share the same SMBus 3.3V or 2.5V operation Commercial or industrial temperature ranges 72-pin 10mm 10mm QFN package GREEN, RoHS, and PFOS compliant Applications PCI Express timing (Gen1/2/3) in Intel platforms, specifically the Romley platform SATA/SAS timing (storage) ESI and SMI systems (storage) Intel Quickpath Interconnect Key Specifications Cycle-to-cycle jitter (PLL mode): <35ps Output-to-output skew: <35ps Input-to-output delay (PLL mode): Fixed at 0ps Input-to-output delay variation (PLL mode): 13ps Phase jitter, PCIe Gen3: 0.25ps Accumulated jitter, QPI 9.6Gbps: <0.15ps Intel is a registered trademark of Intel Corporation. Micrel Inc. 2180 Fortune Drive San Jose, CA 95131 USA tel +1 (408) 944-0800 fax + 1 (408) 474-1000 Micrel, Inc. MDB1900ZC Ordering Information (1) Part Number Marking Shipping Ambient Temperature Range Package MDB1900ZCQY TR MDB1900ZCQ Tape and Reel 40C to +85C 72-Pin 10mm 10mm QFN MDB1900ZCQZ TR MDB1900ZCQ Tape and Reel 0C to +70C 72-Pin 10mm 10mm QFN Note: 1. Device is GREEN, RoHS, and PFOS compliant. Lead finish is 100% matte tin. Pin Configuration 72-Pin 10mm 10mm QFN September 3, 2015 2 Revision 1.2 tcghelp micrel.com or (408) 955-1690