MIC74 2-Wire Serial I/O Expander and Fan Controller General Description Features The MIC74 is a fully programmable serial-to-parallel I/O Provides eight bits of general purpose I/O expander compatible with the SMBus (system manage- Built-in fan speed control logic (optional) ment bus) protocol. It acts as a slave on the bus, providing 2 2-wire SMBus/I C-compatible serial interface plus eight independent I/O lines. interrupt output Each I/O bit can be individually programmed as an input or 2.7V to 3.6V operating voltage range output. If programmed as an output each I/O bit can be 5V-tolerant I/O programmed as an open-drain or complementary push-pull Low quiescent current: 2A (typical) output. If desired, the four most significant I/O bits can be Bit-programmable I/O options: programmed to implement fan speed control. An internal clock generator and state machine eliminate the overhead Input or output generally associated with bit-banging fan speed control. Push-pull or open-drain output Programming the device and reading/writing the I/O bits is Interrupt on input changes accomplished using seven internal registers. All registers Outputs can directly drive LEDs (10mA I ) OL can be read by the host. Output bits are capable of directly Up to 8 devices per bus driving high-current loads, such as LEDs. A separate interrupt output can notify the host of state changes on the Applications input bits without requiring the MIC74 to perform a General purpose I/O expansion via serial bus transaction on the serial bus or be polled by the host. Three address selection inputs are provided, allowing up Personal computer system management to eight devices to share the same bus and provide a total Distributed sensing and control of 64 bits of I/O. Microcontroller I/O expansion The MIC74 is available in an ultra-small-footprint 16-pin Fan control QSOP. Low quiescent current, small footprint, and low package height make the MIC74 ideal for portable and desktop applications. Datasheets and support documentation are available on Micrels web site at: www.micrel.com. Typical Application 2 SMBus is a trademark of Intel Corporation. I C is a trademark of Phillips Electronics N.V. Micrel Inc. 2180 Fortune Drive San Jose, CA 95131 USA tel +1 (408) 944-0800 fax + 1 (408) 474-1000 Micrel, Inc. MIC74 Ordering Information Part Number Junction Temperature Range Package Lead Finish MIC74YQS 40C to +85C 16-Pin QSOP Pb-Free Pin Configuration 16-Pin QSOP (QS) (Top View) Pin Description Pin Number Pin Name Pin Function Address (input): Slave address selection inputs sets the three least significant bits of the MIC74s 1, 2, 3 A0, A1, A2 slave address. P0, P1, Parallel I/O (input/output): General-purpose I/O pin. Direction and output type are user- 4, 5, 6, 7 P2, P3 programmable. 8 GND Ground Parallel I/O (input/output): P4P7 are general-purpose I/O pins. Direction and output type are P4, P5, user-programmable. P6, P7 9, 10, 11, 12 Shutdown (output): When the FAN bit is set, pin 9 becomes SHDN. (/SHDN, /FS0 Fan speed (output): When the FAN bit is set, pins 10 through 12 become /FS0 /FS2 /FS1, /FS2) respectively, controlled by the FAN SPEED register. Interrupt (output): Active-low, open-drain output signals input-change-interrupts to the host on this 13 /ALERT pin. Signal is cleared when the bus master (host) polls the ARA (alert response address = 0001 100) or reads status. 14 CLK Serial bus clock (input): The host provides the serial bit clock in this input. 15 DATA Serial data (input/output): Serial data input and open-drain serial data output. 16 VDD Power supply (input). Revision 3.0 September 30, 2014 2