PIC16(L)F18857/77 Full-Featured 28/40/44-Pin Microcontrollers Description PIC16(L)F18857/77 microcontrollers feature Analog, Core Independent Peripherals and Communication Peripherals, combined with eXtreme Low-Power (XLP) technology for a wide range of general purpose and low-power applications. The family will feature the CRC/SCAN, Hardware Limit Timer (HLT) and Windowed Watchdog Timer (WWDT) to support customers looking to add safety to their application. Additionally, this family includes up to 56 KB of Flash memory, along 2 ) extensions for automated signal analysis to reduce the complexity of the with a 10-bit ADC with Computation (ADC application. Core Features Power-Saving Functionality C Compiler Optimized RISC Architecture DOZE mode: Ability to run the CPU core slower Only 49 Instructions than the system clock Operating Speed: IDLE mode: Ability to halt CPU core while internal - DC 32 MHz clock input peripherals continue operating - 125 ns minimum instruction cycle Sleep mode: Lowest Power Consumption Interrupt Capability Peripheral Module Disable (PMD): 16-Level Deep Hardware Stack - Ability to disable hardware module to Three 8-Bit Timers (TMR2/4/6) with Hardware minimize power consumption of unused Limit Timer (HLT) Extensions peripherals Four 16-Bit Timers (TMR0/1/3/5) Low-Current Power-on Reset (POR) eXtreme Low-Power (XLP) Features Configurable Power-up Timer (PWRTE) Sleep mode: 50 nA 1.8V, typical Brown-out Reset (BOR) with Fast Recovery Watchdog Timer: 500 nA 1.8V, typical Low-Power BOR (LPBOR) Option Secondary Oscillator: 500 nA 32 kHz Windowed Watchdog Timer (WWDT): Operating Current: - Variable prescaler selection -8 A 32 kHz, 1.8V, typical - Variable window size selection -32 A/MHz 1.8V, typical - All sources configurable in hardware or software Programmable Code Protection Digital Peripherals Four Configurable Logic Cells (CLC): Memory - Integrated combinational and sequential logic Three Complementary Waveform Generators Up to 56 KB Flash Program Memory (CWG): Up to 4 KB Data SRAM - Rising and falling edge dead-band control 256B of EEPROM - Full-bridge, half-bridge, 1-channel drive Direct, Indirect and Relative Addressing modes - Multiple signal sources Five Capture/Compare/PWM (CCP) module: Operating Characteristics - 16-bit resolution for Capture/Compare modes Operating Voltage Range: - 10-bit resolution for PWM mode - 1.8V to 3.6V (PIC16LF18857/77) 10-bit PWM: - 2.3V to 5.5V (PIC16F18857/77) - Two 10-bit PWMs Temperature Range: Numerically Controlled Oscillator (NCO): - Industrial: -40C to 85C - Generates true linear frequency control and - Extended: -40C to 125C increased frequency resolution - Input Clock: 0 Hz < F < 32 MHz NCO 20 - Resolution: F /2 NCO Two Signal Measurement Timers (SMT): - 24-bit Signal Measurement Timer - Up to 12 different Acquisition modes 2016-2021 Microchip Technology Inc. DS40001825F-page 1PIC16(L)F18857/77 Digital Peripherals (Cont.) Flexible Oscillator Structure Cyclical Redundancy Check (CRC/SCAN): High-Precision Internal Oscillator: - 16-bit CRC - Software selectable frequency range up to 32 - Scans memory for NVM integrity MHz, 1% typical Communication: x2/x4 PLL with Internal and External Sources - EUSART, RS-232, RS-485, LIN compatible Low-Power Internal 32 kHz Oscillator -Two SPI (LFINTOSC) 2 -Two I C, SMBus, PMBus compatible External 32 kHz Crystal Oscillator (SOSC) Up to 36 I/O Pins: External Oscillator Block with: - Individually programmable pull-ups - Three crystal/resonator modes up to 20 MHz - Slew rate control - Three external clock modes up to 20 MHz - Interrupt-on-change with edge-select Fail-Safe Clock Monitor: - Input level selection control (ST or TTL) - Allows for safe shutdown if peripheral clock - Digital open-drain enable stops - Current mode enable Oscillator Start-up Timer (OST) Peripheral Pin Select (PPS): - Ensures stability of crystal oscillator - Enables pin mapping of digital I/O resources Data Signal Modulator (DSM) - Modulates a carrier signal with digital data to create custom carrier synchronized output waveforms Analog Peripherals Analog-to-Digital Converter with Computation 2 (ADC ): - 10-bit with up to 35 external channels - Automated post-processing - Automates math functions on input signals: averaging, filter calculations, oversampling and threshold comparison - Operates in Sleep Two Comparators (COMP): - Fixed Voltage Reference at (non) inverting input(s) - Comparator outputs externally accessible 5-Bit Digital-to-Analog Converter (DAC): - 5-bit resolution, rail-to-rail - Positive Reference Selection - Unbuffered I/O pin output - Internal connections to ADCs and comparators Voltage Reference: - Fixed Voltage Reference with 1.024V, 2.048V and 4.096V output levels 2016-2021 Microchip Technology Inc. DS40001825F-page 2