PIC32MK GENERAL PURPOSE AND MOTOR CONTROL (GP/MC) FAMILY 32-bit General Purpose and Motor Control Application MCUs with FPU and up to 1 MB Live-Update Flash, 256 KB SRAM, 4 KB EEPROM, and Op amps Operating Conditions: 2.2V to 3.6V Security Features -40C to +105C, DC to 120 MHz Advanced Memory Protection: -40C to +125C, DC to 80 MHz - Peripheral and memory region access control - Secure boot Core: 120 MHz (up to 198 DMIPS) Advanced Analog Features MIPS32 microAptiv MCU core with Floating Point Unit microMIPS mode for up to 40% smaller code size 12-bit ADC module: DSP-enhanced core: - 25.45 Msps 12-bit mode or 33.79 Msps 8-bit mode - Four 64-bit accumulators - 7 individual ADC modules - Single-cycle MAC, saturating and fractional math - 3.75 Msps per S&H with dedicated DMA Code-efficient (C and Assembly) architecture - Up to 42 analog inputs Two 32-bit core register files to reduce interrupt latency Flexible and independent ADC trigger sources Four Op amps and five Comparators Clock Management Up to three 12-bit CDACs Internal temperature sensor 2C accuracy 8 MHz 2% (FRC) internal oscillator -40C to +85C Capacitive Touch Divider (CVD) Programmable PLLs and oscillator clock sources: - HS and EC clock modes Communication Interfaces Secondary USB PLL 32 kHz Internal Low-power RC oscillator (LPRC) Up to four CAN modules (with dedicated DMA channels): Independent external low-power 32 kHz crystal oscillator - 2.0B Active with DeviceNet addressing support Fail-Safe Clock Monitor (FSCM) Up to six UART modules (up to 25 Mbps): Independent Watchdog Timers (WDT) and Deadman Timer (DMT) - Supports LIN 1.2 and IrDA protocols 2 Fast wake-up and start-up Six SPI/I S modules (SPI 50 Mbps) Four Fractional clock out (REFCLKO) modules Parallel Master Port (PMP) Up to two FS USB 2.0-compliant On-The-Go (OTG) controllers Power Management Peripheral Pin Select (PPS) to enable remappable pin functions Low-power management modes (Deep Sleep, Sleep, and Idle) Timers/Output Compare/Input Capture/RTCC Integrated: - Power-on Reset (POR) and Brown-out Reset (BOR) Up to 14 16-bit or one 16-bit and eight 32-bit timers/counters for GP On-board capacitorless regulator and MC devices and six additional QEI 32-bit timers for MC devices 16 Output Compare (OC) modules Motor Control PWM 16 Input Capture (IC) modules Eight PWM pairs PPS to enable function remap Six additional Single-Ended PWM modules Real-Time Clock and Calendar (RTCC) module Dead Time for rising and falling edges Dead-Time Compensation Input/Output 8.33 ns PWM Resolution 5V-tolerant pins with up to 22 mA source/sink Clock Chopping for High-Frequency Operation Selectable internal open drain, pull-ups, and pull-downs PWM Support for: External interrupts on all I/O pins - DC/DC, AC/DC, inverters, PFC, lighting Five programmable edge/level-triggered interrupt pins - BLDC, PMSM, ACIM, SRM motors Choice of six Fault and Current Limit Inputs Qualification and Class B Support Flexible Trigger Configuration for ADC Triggering AEC-Q100 REVG (Grade 1 -40C to +125C) (planned) Class B Safety Library, IEC 60730 (planned) Motor Encoder Interface Back-up internal oscillator Six Quadrature Encoder Interface (QEI) modules: Clock monitor with back-up internal oscillator - Four inputs: Phase A, Phase B, Home, and Index Global register locking Audio/Graphics/Touch Interfaces Debugger Development Support External Graphics interfaces through PMP 2 In-circuit and in-application programming Up to six I S audio data communication interfaces 2-wire or 4-wire MIPS Enhanced JTAG interface Up to six SPI audio control interfaces Unlimited software and 12 complex breakpoints Programmable audio master clock: IEEE 1149.2-compatible (JTAG) boundary scan - Generation of fractional clock frequencies Non-intrusive hardware-based instruction trace - Can be synchronized with USB clock - Can be tuned in run-time Software and Tools Support Unique Features C/C++ compiler with native DSP/fractional support MPLAB Harmony Integrated Software Framework Permanent non-volatile 4-word unique device serial number TCP/IP, USB, Graphics, and mTouch middleware Direct Memory Access (DMA) MFi, Android and Bluetooth audio frameworks RTOS Kernels: Express Logic ThreadX, FreeRTOS, Up to eight channels with automatic data size detection OPENRTOS , Micrim C/OS, and SEGGER embOS Programmable Cyclic Redundancy Check (CRC) Up to 64 KB transfers 2017 Microchip Technology Inc. 1DS60001402D-page PIC32MK GP/MC Family Packages Type QFN TQFP Pin Count 64 64 100 48 (GP devices) 48 (GP devices) 77 (GP devices) I/O Pins (up to) 49 (MC devices) 49 (MC devices) 78 (MC devices) Contact/Lead Pitch 0.50 mm 0.50 mm 0.40 mm Dimensions 9x9x0.9 mm 10x10x1 mm 12x12x1 mm TABLE 1: PIC32MK GENERAL PURPOSE (GP) FAMILY FEA TURES Remappable Peripherals PIC32MK0512GPD064 512 128 TQFP, 4 Y 64 16 Y 9/16/16 6 6 5 8/13 26 4/5 1 Y 1 4 3 1 48 Y Y QFN PIC32MK1024GPD064 1024 256 PIC32MK0512GPD100 512 128 4 Y 100 TQFP 16 Y 9/16/16 6 6 5 8/13 42 4/5 2 Y 1 4 3 1 77 Y Y PIC32MK1024GPD100 1024 256 PIC32MK0512GPE064 512 128 TQFP, 4 Y 64 16 Y 9/16/16 6 6 5 4 8/13 26 4/5 1 Y 1 4 3 1 48 Y Y QFN PIC32MK1024GPE064 1024 256 PIC32MK0512GPE100 512 128 4 Y 100 TQFP 16 Y 9/16/16 6 6 5 4 8/13 42 4/5 2 Y 1 4 3 1 77 Y Y PIC32MK1024GPE100 1024 256 Note 1: Eight out of nine timers are remappable. 2: Four out of five external interrupts are remappable. Legend: An indicates this feature is not available for the listed device. TABLE 2: PIC32MK MOTOR CONTROL (MC) FAMILY FEA TURES Remappable Peripherals PIC32MK0512MCF064 512 128 TQFP, 4 Y 64 16 Y 9/16/16 6 6 5 4 8/13 27 4/5 1 Y 6 12 1 4 3 1 49 Y Y QFN PIC32MK1024MCF064 1024 256 PIC32MK0512MCF100 512 128 4 Y 100 TQFP 16 Y 9/16/16 6 6 5 4 8/13 42 4/5 2 Y 6 12 1 4 3 1 78 Y Y PIC32MK1024MCF100 1024 256 Note 1: Eight out of nine timers are remappable. 2: Four out of five external interrupts are remappable. Legend: An indicates this feature is not available for the listed device. DS60001402D-page 2 2017 Microchip Technology Inc. Device Device Program Memory (KB) Program Memory (KB) Data Memory (KB) Data Memory (KB) EE Memory (KB) EE Memory (KB) Floating Point Unit (FPU) Floating Point Unit (FPU) Pins Pins Packages Packages Boot Flash Memory (KB) Boot Flash Memory (KB) Remappable Pins Remappable Pins (1) (1) Timers/Capture/Compare Timers/Capture/Compare UART UART 2 2 SPI/I S SPI/I S (2) (2) External Interrupts External Interrupts CAN 2.0B CAN 2.0B DMA Channels DMA Channels (Programmable/Dedicated) (Programmable/Dedicated) ADC (Channels) ADC (Channels) Op amp/Comparator Op amp/Comparator USB 2.0 FS OTG USB 2.0 FS OTG PMP PMP QEI RTCC MCPWM REFCLK RTCC CDAC REFCLK CTMU CDAC I/O Pins CTMU I/O Pins JTAG/ICSP Trace JTAG/ICSP Trace