PIC32MX1XX/2XX/5XX 64/100-PIN 32-bit Microcontrollers (up to 512 KB Flash and 64 KB SRAM) with Audio/Graphics/Touch (HMI), CAN, USB, and Advanced Analog Operating Conditions Timers/Output Compare/Input Capture 2.3V to 3.6V, -40C to +105C (DC to 40 MHz), Five General Purpose Timers: -40C to +85C (DC to 50 MHz) - Five 16-bit and up to two 32-bit Timers/Counters Five Output Compare (OC) modules Core: 50 MHz/83 DMIPS MIPS32 M4K Five Input Capture (IC) modules MIPS16e mode for up to 40% smaller code size Peripheral Pin Select (PPS) to allow function remap Code-efficient (C and Assembly) architecture Real-Time Clock and Calendar (RTCC) module Single-cycle (MAC) 32x16 and two-cycle 32x32 multiply Communication Interfaces Clock Management USB 2.0-compliant Full-speed OTG controller 0.9% internal oscillator Up to five UART modules (12.5 Mbps): Programmable PLLs and oscillator clock sources - LIN 1.2 protocols and IrDA support Fail-Safe Clock Monitor (FSCM) Four 4-wire SPI modules (25 Mbps) Independent Watchdog Timer 2 Two I C modules (up to 1 Mbaud) with SMBus support Fast wake-up and start-up PPS to allow function remap Power Management Parallel Master Port (PMP) with dual read/write buffers Low-power management modes (Sleep and Idle) Controller Area Network (CAN) 2.0B Compliant with DeviceNet addressing support Integrated Power-on Reset, Brown-out Reset, and High Voltage Detect Direct Memory Access (DMA) 0.5 mA/MHz dynamic current (typical) Four channels of hardware DMA with automatic data 44 A IPD current (typical) size detection Audio/Graphics/Touch HMI Features 32-bit Programmable Cyclic Redundancy Check (CRC) External graphics interface with up to 34 PMP pins Two additional channels dedicated to USB 2 Audio data communication: I S, LJ, RJ, USB Two additional channels dedicated to CAN 2 Audio data control interface: SPI and I C Input/Output Audio data master clock: 10 mA or 15 mA source/sink for standard VOH/VOL and - Generation of fractional clock frequencies up to 22 mA for non-standard VOH1 - Can be synchronized with USB clock 5V-tolerant pins - Can be tuned in run-time Selectable open drain, pull-ups, and pull-downs Charge Time Measurement Unit (CTMU): External interrupts on all I/O pins - Supports mTouch capacitive touch sensing - Provides high-resolution time measurement (1 ns) Qualification and Class B Support Advanced Analog Features AEC-Q100 REVG (Grade 2 -40C to +105C) ADC Module: Class B Safety Library, IEC 60730 - 10-bit 1 Msps rate with one Sample and Hold (S&H) Debugger Development Support - Up to 48 analog inputs - Can operate during Sleep mode In-circuit and in-application programming 4-wire MIPS Enhanced JTAG interface Flexible and independent ADC trigger sources On-chip temperature measurement capability Unlimited program and six complex data breakpoints Comparators: IEEE 1149.2-compatible (JTAG) boundary scan - Three dual-input Comparator modules - Programmable reference with 32 voltage points Packages Type QFN TQFP TFBGA (see Note 1) Pin Count 64 64 100 100 100 I/O Pins (up to) 53 53 85 85 85 Contact/Lead Pitch 0.50 mm 0.50 mm 0.40 mm 0.50 mm 0.65 mm Dimensions 9x9x0.9 mm 10x10x1 mm 12x12x1 mm 14x14x1 mm 7x7x1.2 mm Note 1: Please contact your local Microchip Sales Office for information regarding the availability of devices in the 100-pin TFBGA package. 2014-2017 Microchip Technology Inc. DS60001290E-page 1PIC32MX1XX/2XX/5XX 64/100-PIN FAMILY TABLE 1: PIC32MX1XX/2XX/5XX 64/100-PIN CONTROLLER FAMILY FEATURES Remappable Peripherals QFN, PIC32MX120F064H 64 64+3 8 37 5/5/5 4 3 5 28 3 N 0 Y 2 Y Y 4/0 53 Y TQFP QFN, PIC32MX130F128H 64 128+3 16 37 5/5/5 4 3 5 28 3 N 0 Y 2 Y Y 4/0 53 Y TQFP 100 TQFP PIC32MX130F128L 128+3 16 54 5/5/5 5 4 5 48 3 N 0 Y 2 Y Y 4/0 85 Y 100 TFBGA QFN, PIC32MX230F128H 64 128+3 16 37 5/5/5 4 3 5 28 3 Y 0 Y 2 Y Y 4/2 49 Y TQFP 100 TQFP 4/2 PIC32MX230F128L 128+3 16 54 5/5/5 5 4 5 48 3 Y 0 Y 2 Y Y 81 Y 100 TFBGA QFN, PIC32MX530F128H 64 128+3 16 37 5/5/5 4 3 5 28 3 Y 1 Y 2 Y Y 4/4 49 Y TQFP 100 TQFP PIC32MX530F128L 128+3 16 54 5/5/5 5 4 5 48 3 Y 1 Y 2 Y Y 4/4 81 Y 100 TFBGA QFN, PIC32MX150F256H 64 256+3 32 37 5/5/5 4 3 5 28 3 N 0 Y 2 Y Y 4/0 53 Y TQFP 100 TQFP PIC32MX150F256L 256+3 32 54 5/5/5 5 4 5 48 3 N 0 Y 2 Y Y 4/0 85 Y 100 TFBGA QFN, PIC32MX250F256H 64 256+3 32 37 5/5/5 4 3 5 28 3 Y 0 Y 2 Y Y 4/2 49 Y TQFP 100 TQFP PIC32MX250F256L 256+3 32 54 5/5/5 5 4 5 48 3 Y 0 Y 2 Y Y 4/2 81 Y 100 TFBGA QFN, PIC32MX550F256H 64 256+3 32 37 5/5/5 4 3 5 28 3 Y 1 Y 2 Y Y 4/4 49 Y TQFP 100 TQFP PIC32MX550F256L 256+3 32 54 5/5/5 5 4 5 48 3 Y 1 Y 2 Y Y 4/4 81 Y 100 TFBGA QFN, PIC32MX170F512H 64 512+3 64 37 5/5/5 4 3 5 28 3 N 0 Y 2 Y Y 4/0 53 Y TQFP 100 TQFP PIC32MX170F512L 512+3 64 54 5/5/5 5 4 5 48 3 N 0 Y 2 Y Y 4/0 85 Y 100 TFBGA QFN, PIC32MX270F512H 64 512+3 64 37 5/5/5 4 3 5 28 3 Y 0 Y 2 Y Y 4/2 49 Y TQFP 100 TQFP PIC32MX270F512L 512+3 64 54 5/5/5 5 4 5 48 3 Y 0 Y 2 Y Y 4/2 81 Y 100 TFBGA QFN, PIC32MX570F512H 64 512+3 64 37 5/5/5 4 3 5 28 3 Y 1 Y 2 Y Y 4/4 49 Y TQFP 100 TQFP PIC32MX570F512L 512+3 64 54 5/5/5 5 4 5 48 3 Y 1 Y 2 Y Y 4/4 81 Y 100 TFBGA Note 1: All devices feature 3 KB of Boot Flash memory. 2: Four out of five timers are remappable. 3: Four out of five external interrupts are remappable. 4: Please contact your local Microchip Sales Office for information regarding the availability of devices in the 100-pin TFBGA package. DS60001290E-page 2 2014-2017 Microchip Technology Inc. Device Pins (4) Packages (1) Program Memory (KB) Data Memory (KB) Remappable Pins (2) Timers/Capture/Compare UART 2 SPI/I S (3) External Interrupts 10-bit 1 Msps ADC (Channels) Analog Comparators USB On-The-Go (OTG) CAN CTMU 2 I C PMP RTCC DMA Channels (Programmable/Dedicated) I/O Pins JTAG