SCH5147 Super I/O with Temperature Sensing, PECI Interface, Auto Fan Control and Glue Logic Serial Port Product Features - Two Full Function Serial Ports General Features - High Speed NS16C550A Compatible UARTs - 3.3 Volt Operation (Most I/O Pins are 5 Volt with Send/Receive 16-Byte FIFOs Tolerant) - Supports 230k and 460k Baud - LPC Interface - Programmable Baud Rate Generator - PC99, PC2001 Compliant - Modem Control Circuitry - ACPI 2.0 Compliant - 480 Address and 15 IRQ Options - Multiplexed Command, Address and Data Multi-Mode Parallel Port with ChiProtect Bus , PC/AT , and - Standard Mode IBM PC/XT - Serial IRQ Interface Compatible with Serial- PS/2 Compatible Bi-directional Parallel ized IRQ Support for PCI Systems Port - PME Interface - Enhanced Parallel Port (EPP) Compatible - - ISA Plug-and-Play Compatible Register Set EPP 1.7 and EPP 1.9 (IEEE 1284 Compliant) - Programmable Wake-up Event (PME) Inter- - IEEE 1284 Compliant Enhanced Capabilities face Port (ECP) - System Management Interrupt (SMI) - ChiProtect Circuitry for Protection - 29 General Purpose Input/Output Pins - 960 Address, Up to 15 IRQ and Four DMA PECI Interface Options - Supports PECI REQUEST and PECI AVAIL- Keyboard Controller ABLE signaling - 8042 Software Compatible AMD SB-TSI Interface - 8 Bit Microcomputer AC Power Failure Recovery - 2k Bytes of Program ROM Watchdog Timer Capable to Pulse PWRGD Low - 256 Bytes of Data RAM and Change GPO Polarity - Four Open Drain Outputs Dedicated for Key- board/Mouse Interface 2.88MB Super I/O Floppy Disk Controller - Asynchronous Access to Two Data Registers - Licensed CMOS 765B Floppy Disk Controller and One Status Register - Software and Register Compatible with - Supports Interrupt and Polling Access Microchip s Proprietary 82077AA Compatible - 8 Bit Counter Timer Core - Port 92 Support - Supports One Floppy Drive - Fast Gate A20 and KRESET Outputs - Configurable Open Drain/Push-Pull - Phoenix Keyboard BIOS ROM Output Drivers Motherboard GLUE Logic - Supports Vertical Recording Format - 16-Byte Data FIFO - Resume Reset Signal Generation - 100% IBM Compatibility - (4) Buffered PCI Reset Outputs with software - Detects All Overrun and Underrun Conditions controlled reset capability - Sophisticated Power Control Circuitry (PCC) - Two 3VSB Gate signal generation for Sus- Including Multiple Powerdown Modes for pend to RAM or S3/S5 Wake up dual power Reduced Power Consumption plane control - DMA Enable Logic - Front Panel Reset Debouncing and Main - Data Rate and Drive Control Registers 3.3V Power Good Signal Generation - 480 Address, Up to Eight IRQ and Four DMA - Power Supply Turn On Circuitry with Support Options for power button on PS/2 Keyboard - Support 3 Mode FDD - Switches for SMBus Isolation or Voltage Translation for DDC to VGA Monitor Circuitry Enhanced Digital Data Separator - LED Control (2) - 2 Mbps, 1 Mbps, 500 Kbps, 300 Kbps, 250 - Speaker Input & Output Control Kbps Data Rates - Programmable Precompensation Modes 2014 Microchip Technology Inc. DS00001788A-page 1SCH5147 Fan Control vides support for PECI and SB-TSI readings. The PECI implementation in the SCH5147 includes support for - LPC compliant interface for Hardware Moni- the PECI REQUEST and PECI AVAILABLE signals toring that are used to wake processors from the C3/C4sleep - 3 PWM (Pulse width Modulation) Outputs states. The hardware monitoring block of the SCH5147 with High Frequency PWM Support is accessible via the LPC Bus. The out-of -limit tem- - 3 Fan Tachometer Inputs perature, voltage of fan tachometer events can be - Three Programmable automatic fan control reported on the PME and/or SMI output pin and thermal zones based on Selectable Tempera- speaker alarm annunciation. ture Reading - Fan Tachometer Event Generate PME, SMI The Motherboard Glue logic includes various power and/or Speaker Warning management and system logic including generation of Temperature Monitor nRSMRST, SMBus isolation buffers, and buffered PCI reset outputs. - Monitoring of Two Remote Thermal Diodes with 3C TYP, 5C MAX Accuracy The SCH5147 incorporates complete legacy Super I/O - Internal Ambient Temperature Measurement functionality including an 8042 based keyboard and - Beta Compensation for Accurate Tempera- mouse controller, an IEEE 1284, EPP, and ECP com- ture Sensing on Intel 65nm CPUs patible parallel port, one serial port that is 16C550A - PECI Interface as Input for Thermal Monitor- UART compatible, one IrDA 1.0 infrared ports, and a ing and Fan Control floppy disk controller with Microchip s true CMOS 765B - AMD SB-TSI Interface as Input for Thermal core and enhanced digital data separator. The true Monitoring and Fan Control CMOS 765B core provides 100% compatibility with - Limit Comparison of all Monitored Values IBM PC/XT and PC/AT architectures and is software - Thermal Event can Generate PME, SMI and/ and register compatible with Microchip s proprietary or Speaker Warning 82077AA core. System related functionality, which Processor Hot and Thermal Trip Support offers flexibility to the system designer, General Pur- pose I/O control functions, control of two LED s, and fan Voltage Monitor control using fan tachometer inputs and pulse width - Monitor Power supplies (V1 IN for +12V, modulator (PWM) outputs. V2 IN for +5V, +2.5V, VCCP, VBAT, +3.3VTR, +3.3VCC, +1.5VTRIP) The SCH5147 is ACPI 1.0/2.0 compatible and there- - Limit Comparison of all Monitored Values fore supports multiple low power-down modes. It incor- - Voltage Event can generate PME, SMI and/or porates sophisticated power control circuitry (PCC), Speaker Warning which includes support for keyboard and mouse wake- up events. Intruder Detection Support 8 VID (Voltage Identification) Input/Output Pins The SCH5147 supports the ISA Plug-and-Play Stan- dard register set (Version 1.0a). The I/O Address, DMA VRD revision 10 or 11 Detection Channel and hardware IRQ of each logical device in 128-Pin QFP (3.2mm footprint), RoHS Compliant the SCH5147 may be reprogrammed through the inter- Package nal configuration registers. There are up to 480 (960 - Parallel Port) I/O address location options, a Serialized Description IRQ interface, and Three DMA channels. The SCH5147 is a 3.3V (Super I/O Block is 5V tolerant) PC99/PC2001 compliant Super I/O controller with an LPC interface. The SCH5147 also includes Hardware Monitoring capabilities, enhanced Security features, Power Control logic and Motherboard Glue logic. The SCH5147 s hardware monitoring capability includes temperature, voltage and fan speed monitor- ing. It has the ability to alert the system to out-of-limit conditions and automatically control the speeds of mul- tiple fans. There are five analog inputs for monitoring external voltages of +V1 IN (for scaled +12V), V2 IN (for scaled +5V), VTRIP (1.5V), +2.5V and VCCP (core processor voltage), as well as internal monitoring of the SIO s VCC, VTR, and VBAT power supplies. The SCH5147 includes support for monitoring two external temperatures via thermal diode inputs and an internal sensor for measuring ambient temperature. It also pro- DS00001788A-page 2 2014 Microchip Technology Inc.