SCH5636 Desktop Embedded Controller with Fan Control, Hardware Monitoring and PECI - 400 KHz Capable Highlights - Hardware Bus Access Fairness Interface High Performance 32-bit ARC-625D Embedded - Detects SMBus Time-outs Controller (EC) - One controller can be multiplexed onto a low - 96KB Closely Coupled Instruction ROM voltage SMBus - 16 KB Single Cycle 32-bit Wide Dual-ported PECI Interface 2.0 SRAM, Accessible as Closely Coupled Data - Supports PECI REQUEST and PECI Memory and Instruction Memory READY signaling - 32 x 32 64 Multiply - Supports up to 2 CPUs and 4 domains - Maskable Interrupt Aggregator Interface Temperature reading from PCH over SMBus - Maskable Hardware Wake-Up Events Temperature reading from AMD-TSI over SMBus - Idle and Sleep modes Temperature Monitor - JTAG Debug Port - Monitoring up to 2 Remote Thermal Diodes - MCU Serial Debug Port plus an Anti-Parallel Remote Thermal Diode - 5-Channel DMA Interface - Built-in ADC supports temperature readings ACPI 2.0 Compliant from -63 degrees Celsius to +192 degrees PC2001 Compliant Celsius LPC Interface Supports monitoring of discrete diodes (3904 - Supports LPC Bus frequencies of 19MHz to type diodes) Supports monitoring substrate diodes (45nm & 33MHz 65nm processor diodes) - Multiplexed Command, Address and Data - Temperature resolution is 0.125 degrees Cel- Bus sius - Serial IRQ Interface Compatible with Serial- - Internal Ambient Temperature Measurement ized IRQ Support for PCI Systems - Out-of-limit Temperature Event reporting - PME Interface Bi-directional PROCHOT Pin 3.3-Volt I/O - Interrupt generation for PROCHOT Assert 128-pin QFP RoHS Compliant Package events Three Programmable 16-bit Timers - May be used by AMTA and PTTA features to 32-bit Performance Timer adjust fan control limits System Watch Dog Timer (WDT) - May be configured to force fans on full Battery Backed Resources - Supports PROCHOT Assertions to external - Power-Fail Status Register CPU - VBat backed 64 byte memory - Supports PROCHOT Throttle Events to Two EC-based SMBus 2.0 Host Controllers external CPU - Allows Master or Dual Slave Operation - Supports Interrupt Event to Host - Controllers are Fully Operational on Standby Voltage Monitor Power - Monitoring VBAT, VTR,VCC and Vtt power 2 - DMA-driven I C Network Layer supplies 2 -I C Datalink Compatibility Mode - Monitoring of one external voltage - Multi-Master Capable - Limit comparison on monitored values - Supports Clock Stretching PWM (Pulse width Modulation) Outputs (4) - Programmable Bus Speeds - Multiple Clock Rates - 16-bit ON and 16-bit OFF Counters 2010 - 2015 Microchip Technology Inc. DS00001984A-page 1SCH5636 Fan tachometer Inputs (4) Keyboard Controller - Programmable to monitor standard tachome- - 8042 Software Compatible ter outputs or locked rotor alarm outputs - 8 Bit Microcomputer - Generate tachometer event when speed of - 2k Bytes of Program ROM fan drops below programmed limit - 256 Bytes of Data RAM Internal clock sources - Four Open Drain Outputs Dedicated for Key- - A Ring Oscillator generates 64 MHz clock board/Mouse Interface - SIO clocks derived from a 96MHz PLL syn- - Asynchronous Access to Two Data Registers chronized to a 14.318MHz clock input and One Status Register - Main ring generates 32kHz standby clock - Supports Interrupt and Polling Access when external 32.768KHz clock source is off - 8 Bit Counter Timer Low Battery Warning - Port 92 Support LED Control - Fast Gate A20 and KRESET Outputs - Two LEDs to indicate system state Serial Ports Programmable Wake-up Event Interface - Two Full Function Serial Ports General Purpose Input/Output Pins (60 total) - High Speed NS16C550A Compatible UARTs System Management Interrupt (SMI) with Send/Receive 16-Byte FIFOs GLUE Logic - Programmable Baud Rate Generator - 4 Buffered PCI Reset Outputs - Modem Control Circuitry - Power OK Signal Generation - Any LPC Address Configurable. 15 IRQ - Power Sequencing Options - Power Supply Turn On Circuitry Multi-Mode Parallel Port with ChiProtect , - Resume Reset Signal Generation - Standard Mode IBM PC/XT PC/AT , and PS/2 Compatible Bi-directional Parallel - Speaker output Port - Intrusion Detection - Enhanced Parallel Port (EPP) Compatible - 2.88MB Super I/O Floppy Disk Controller EPP 1.7 and EPP 1.9 (IEEE 1284 Compliant) - Licensed CMOS 765B Floppy Disk Controller - IEEE 1284 Compliant Enhanced Capabilities - Software and Register Compatible with Port (ECP) Microchip s Proprietary 82077AA Compatible - ChiProtect Circuitry for Protection Core - 960 Addresses, Up to 15 IRQ and Four DMA - Configurable Open Drain/Push-Pull Output Options Drivers - Supports Vertical Recording Format - 16-Byte Data FIFO - 100% IBM Compatibility - Detects All Overrun and Underrun Conditions - Sophisticated Power Control Circuitry (PCC) Including Multiple Powerdown Modes for Reduced Power Consumption - DMA Enable Logic - Data Rate and Drive Control Registers - 480 Address, Up to Eight IRQ and Four DMA Options Enhanced Digital Data Separator - 1 Mbps, 500 Kbps, 300 Kbps, 250 Kbps Data Rates - Programmable Precompensation Modes DS00001984A-page 2 2010 - 2015 Microchip Technology Inc.