SG1842/SG1843 Series CUR RENT MOD E PWM C ONTR OLLER TM P RODUCTION D AT A S HEET KEY FEATURES DESCRIPTION The SG1842/43 family of control IC s provides all lockout, current limiting circuitry and start-up OPTIMIZED FOR OFF-LINE the necessary features to implement off-line fixed current of less than 1mA. The totem-pole output CONTROL LOW START-UP CURRENT (<1mA) frequency, current-mode switching power supplies is optimized to drive the gate of a power AUTOMATIC FEED FORWARD with a minimum number of external components. MOSFET. The output is low in the off state to COMPENSATION Current-mode architecture demonstrates improved provide direct interface to an N channel device. TRIMMED OSCILLATOR line regulation, improved load regulation, pulse- The SG1842/43 is specified for operation over DISCHARGE CURRENT by-pulse current limiting and inherent protection the full military ambient temperature range of - PULSE-BY-PULSE CURRENT of the power supply output switch. The bandgap 55C to 125C. The SG2842/43 is specified for LIMITING ENHANCED LOAD RESPONSE reference is trimmed to 1% over temperature. the industrial range of -25C to 85C, and the CHARACTERISTICS Oscillator discharge current is trimmed to less SG3842/43 is designed for the commercial range UNDER-VOLTAGE LOCKOUT than 10%. The SG1842/43 has under-voltage of 0C to 70C. WITH 6V HYSTERESIS (SG1842 only) DOUBLE-PULSE SUPPRESSION IMPORTANT: For the most current data, consult MICROSEMIs website: PRODUCT DA T ABOOK 1996/1997 SG1842/SG1843 Series C URRENT-M ODE PWM C ONTROLLER P RODUCTION D ATA S HEET PACKAGE PIN OUTS ABSOLUTE MAXIMUM RATINGS (Notes 1 & 2) Supply Voltage (I < 30mA) ...............................................................Self Limiting CC 1 8 COMP V Supply Voltage (Low Impedance Source) ........................................................ 30V REF 27 V V FB CC Output Current (Peak) .......................................................................................1A 36 I OUTPUT SENSE Output Current (Continuous) .......................................................................350mA 45 R /C GND T T Output Energy (Capacitive Load)....................................................................... 5J M & Y PACKAGE Analog Inputs (Pins 2, 3) ................................................................. -0.3V to +6.3V (Top View) Error Amp Output Sink Current .....................................................................10mA M Package: Pb-free / RoHS 100% Matte Tin Lead Finish Power Dissipation at T = 25C (DIL-8) ............................................................1W A 1 8 COMP V REF Operating Junction Temperature 27 V V FB CC Hermetic (J, Y, F, L Packages) ................................................................... 150C 36 I OUTPUT SENSE Plastic (N, M, D, DM Packages) ................................................................ 150C 45 R /C GND T T Storage Temperature Range.......................................................... -65C to +150C DM PACKAGE Lead Temperature (Soldering, 10 Seconds).................................................. 300C (Top View) Pb-free / RoHS Peak Package Solder Reflow Temp. (40 second max. exposure)........ 260C (+0, -5) Pb-free / RoHS 100% Matte Tin Lead Finish Note 1. Exceeding these ratings could cause damage to the device. 1 14 COMP V REF Note 2. All voltages are with respect to Pin 5. All currents are positive into the specified 213 N.C. N.C. terminal. 312 V V FB CC 411 N.C. V C THERMAL DATA 510 I OUTPUT SENSE 69 N.C. GND M PACKAGE: 78 R /C PWR GND T T THERMAL RESISTANCE-JUNCTION TO AMBIENT, 95C/W JA D PACKAGE N PACKAGE: (Top View) Pb-free / RoHS 100% Matte Tin Lead Finish THERMAL RESISTANCE-JUNCTION TO AMBIENT, 65C/W JA COMP 1 14 V REF DM PACKAGE: N.C. 213 N.C. THERMAL RESISTANCE-JUNCTION TO AMBIENT, 165C/W V 312 V JA FB CC N.C. 411 V C D PACKAGE: I 510 OUTPUT SENSE THERMAL RESISTANCE-JUNCTION TO AMBIENT, 120C/W N.C. 69 GROUND JA R /C 78 POWER GND T T Y PACKAGE: THERMAL RESISTANCE-JUNCTION TO AMBIENT, 130C/W J & N PACKAGE JA (Top View) J PACKAGE: N Package: Pb-free / RoHS 100% Matte Tin Lead Finish THERMAL RESISTANCE-JUNCTION TO AMBIENT, 80C/W JA 1. COMP 10.V REF 1 10 2. V F PACKAGE: 9. V FB 29 CC 3. I 38 8. V SENSE C THERMAL RESISTANCE-JUNCTION TO CASE, 80C/W 47 4. R /C JC 7. OUTPUT T T 56 5. POWER GND 6. GND THERMAL RESISTANCE-JUNCTION TO AMBIENT, 145C/W JA L PACKAGE: F PACKAGE THERMAL RESISTANCE-JUNCTION TO CASE, 35C/W JC (Top View) THERMAL RESISTANCE-JUNCTION TO AMBIENT, 120C/W JA 32 120 19 1. N.C. 11. N.C. Junction Temperature Calculation: T = T + (P x ). 2. COMP 12. GROUND J A D JA The numbers are guidelines for the thermal performance of the device/pc-board 3. N.C. 13. N.C. 4 18 JA 4. N.C. 14. N.C. system. All of the above assume no ambient airflow. 5 17 5. V 15. OUTPUT FB 6 16 6. N.C. 16. N.C. 7 15 7. I 17. V SENSE CC 8 14 8. N.C. 18. N.C. 9. N.C. 19. N.C. 10. R /C 20. V T T REF 91101 12 13 L PACKAGE (Top View) Copyright 2000 2 Rev. 1.6a 10/04