SST25VF080B 8-Mbit SPI Serial Flash Features Packages Single Voltage Read and Write Operations 8-lead PDIP (300 mils), 8-lead SOIC (200 mils), 8-contact WSON (6 mm x 5 mm) and 16-ball - 2.7V-3.6V XFBGA (Z-Scale) Serial Interface Architecture: See Figure 2-1 for pin assignments. - SPI Compatible: Mode 0 and Mode 3 High-Speed Clock Frequency: Description - Up to 66 MHz 25 series Serial Flash family features a four-wire, Superior Reliability: SPI-compatible interface that allows for a low pin-count - Endurance: 100,000 Cycles (typical) package which occupies less board space and ulti- - Greater than 100 years Data Retention mately lowers total system costs. The SST25VF080B Low-Power Consumption: devices are enhanced with improved operating fre- - Active Read Current: 10 mA (typical) quency and lower power consumption. SST25VF080B SPI serial flash memories are manufactured with pro- - Standby Current: 5 A (typical) prietary, high-performance CMOS SuperFlash tech- Flexible Erase Capability: nology. The split-gate cell design and thick-oxide - Uniform 4-Kbyte sectors tunneling injector attain better reliability and manufac- - Uniform 32-Kbyte overlay blocks turability compared with alternate approaches. - Uniform 64-Kbyte overlay blocks The SST25VF080B devices significantly improve per- Fast Erase and Byte Program: formance and reliability, while lowering power con- - Chip Erase Time: 35 ms (typical) sumption. The devices write (program or erase) with a single power supply of 2.7V-3.6V for SST25VF080B. - Sector/Block Erase Time: 18 ms (typical) The total energy consumed is a function of the applied - Byte Program Time: 7 s (typical) voltage, current, and time of application. Since for any Auto Address Increment (AAI) Programming: given voltage range, the SuperFlash technology uses - Decrease total chip programming time over less current to program and has a shorter erase time, Byte Program operations the total energy consumed during any erase or pro- End of Write Detection: gram operation is less than alternative flash memory - Software polling the BUSY bit in STATUS technologies. Register - Busy Status readout on SO pin in AAI Mode Hold Pin (HOLD ): - Suspends a serial sequence to the memory without deselecting the device Write Protection (WP ): - Enables/Disables the Lock-Down function of the STATUS register Software Write Protection: - Write protection through Block Protection bits in STATUS register Temperature Range: - Commercial: 0C to +70C - Industrial: -40C to +85C All devices are RoHS compliant 2005-2020 Microchip Technology Inc. DS20005045D-page 1SST25VF080B 1.0 BLOCK DIAGRAM FIGURE 1-1: FUNCTIONAL BLOCK DIAGRAM SuperFlash X - Decoder Memory Address Buffers and Latches Y - Decoder I/O Buffers Control Logic and Data Latches Serial Interface CE SCK SI SO WP HOLD 2005-2020 Microchip Technology Inc. DS20005045D-page 2